From 85f830063cfb8f388c5199eeb34fe3df3d8b5225 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 25 Nov 2021 09:13:39 +0100 Subject: linux: bsp-[45]1x: non-target: Move SCCG/Clean peripheral clocks definition The parameter names of the DEF_GEN3_PE() macro are correct: the second parent is the clean parent clock. Signed-off-by: Geert Uytterhoeven --- projects/linux/bsp-51x-upport-request.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'projects/linux/bsp-51x-upport-request.yaml') diff --git a/projects/linux/bsp-51x-upport-request.yaml b/projects/linux/bsp-51x-upport-request.yaml index fdcfd75..fc51136 100644 --- a/projects/linux/bsp-51x-upport-request.yaml +++ b/projects/linux/bsp-51x-upport-request.yaml @@ -237,7 +237,6 @@ bsp51x: - a605f70375dcab767226f340c570e178f5b53456 # clk: renesas: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - 5582d6cdb469f1b4bbab91166e0bff096ee4f610 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990 - f85a5549ef4c09def187464cb72bcace0c8c1cf4 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider - - e47c3bbf9fdff8663c532cbdfb37fe2679c12269 # clk: renesas: rcar-gen3: Fix SCCG/Clean peripheral clocks definition - ce47cc590b66d6aa4e2333daff4eb680a594be31 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST - 9dfba43fd5dc1da1bfec66dadfb10c14cf4a72f9 # clk: renesas: rcar-gen3: Use max_rate as maximum rate for normal clock instead max_freq - 7935bac0719228175524c4d868c1244ce3579840 # crypto: ccree - add support cts1(cbc) algorithm -- cgit v1.2.3