diff options
Diffstat (limited to 'projects/linux/io/done')
| -rw-r--r-- | projects/linux/io/done/BSP41-upport-unsorted-patches.yaml | 3 | ||||
| -rw-r--r-- | projects/linux/io/done/SDHI-refactor-SDHn.yaml | 4 | ||||
| -rw-r--r-- | projects/linux/io/done/V3U-enable_PWM.yaml | 3 | ||||
| -rw-r--r-- | projects/linux/io/done/V3U-enable_RPC.yaml | 3 |
4 files changed, 13 insertions, 0 deletions
diff --git a/projects/linux/io/done/BSP41-upport-unsorted-patches.yaml b/projects/linux/io/done/BSP41-upport-unsorted-patches.yaml index 26111ce..7c2274f 100644 --- a/projects/linux/io/done/BSP41-upport-unsorted-patches.yaml +++ b/projects/linux/io/done/BSP41-upport-unsorted-patches.yaml @@ -10,6 +10,9 @@ bsp41x: - 9915223f41c7d680aaaed12971601dc038ce76a3 # serial: sh-sci: Using mask when writing to HSRTRGR - 12ef3158400ee43d9fb662f8dae804bc89aa5799 # serial: sh-sci: Fix transfer sequence of unsupport DMA transfer +bsp51x: + - 5680e77f2427bdb7943e985c7840a362925c535f # i2c: rcar: Tidy up the register order for hardware specification ver1.00. + upstream: - torvalds: 2ea2e019c190ee3973ef7bcaf829d8762e56e635 # serial: sh-sci: Fix off-by-one error in FIFO threshold register setting - torvalds: e7f4264821a4ee07775f3775f8530cfa9a6d4b5d # i2c: rcar: enable interrupts before starting transfer diff --git a/projects/linux/io/done/SDHI-refactor-SDHn.yaml b/projects/linux/io/done/SDHI-refactor-SDHn.yaml index ecf88f7..869148b 100644 --- a/projects/linux/io/done/SDHI-refactor-SDHn.yaml +++ b/projects/linux/io/done/SDHI-refactor-SDHn.yaml @@ -9,6 +9,10 @@ bsp41x: - 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - a91a23d1d738335d5a92af0e2a18b1ddbcf3d602 # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC +bsp51x: + - 7013e474a179b299f9a2e0e28f87a6de8820d78b # clk: Add support parent clock in set_phase + - bbf1b3923dd954f3c904a1aefd983dae76faf7be # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC + upstream: - torvalds: a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 # clk: renesas: rcar-gen3: Add dummy SDnH clock - torvalds: 1abd04480866cead7b4129bd03246315b4575334 # clk: renesas: rcar-gen3: Add SDnH clock diff --git a/projects/linux/io/done/V3U-enable_PWM.yaml b/projects/linux/io/done/V3U-enable_PWM.yaml index 5b88604..3b0b710 100644 --- a/projects/linux/io/done/V3U-enable_PWM.yaml +++ b/projects/linux/io/done/V3U-enable_PWM.yaml @@ -8,6 +8,9 @@ bsp41x: - 73d8a0fb46ab4f822f953ad20e5fbdb5998352c1 # pwm: rcar: Add a judgment of the period out of range - 91284dd61b7c36fe536d8ad6c473bbc04b4328da # arm64: dts: renesas: r8a779a0: Add PWM nodes +bsp51x: + - f56ebd6b2b64650f657fe9b386bb81ccb325f4e2 # pwm: rcar: Add a judgment of the period out of range + upstream: comments: diff --git a/projects/linux/io/done/V3U-enable_RPC.yaml b/projects/linux/io/done/V3U-enable_RPC.yaml index b840a6e..959d2d7 100644 --- a/projects/linux/io/done/V3U-enable_RPC.yaml +++ b/projects/linux/io/done/V3U-enable_RPC.yaml @@ -11,6 +11,9 @@ bsp41x: - e05ce4b3ba724c77bd19f138476dc97d27eba824 # arm64: dts: renesas: r8a779a0: Add RPC-IF node - 44c210c0fa36a53c3fb08e95e5a6dad8ad9b345d # arm64: dts: renesas: falcon: Add QSPI flash support +bsp51x: + - a614604bbbb8f06844d993e67915afbda7d99e78 # arm64: dts: renesas: r8a779a0: Add RPC-IF node + upstream: - torvalds: fff53a551db50f5edecaa0b29a64056ab8d2bbca # memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode - torvalds: 797f082738b10ff397c8d3b7804b747d766e62e6 # dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF |