diff options
Diffstat (limited to 'projects/linux/core')
| -rw-r--r-- | projects/linux/core/bsp41x_clk_renesas.yaml | 5 | ||||
| -rw-r--r-- | projects/linux/core/rcar3_cpufreq.yaml | 16 |
2 files changed, 16 insertions, 5 deletions
diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml index 5589c3d..c5afa1d 100644 --- a/projects/linux/core/bsp41x_clk_renesas.yaml +++ b/projects/linux/core/bsp41x_clk_renesas.yaml @@ -6,8 +6,6 @@ status: New bsp41x: - 7a967a750a3409554d72d9bc3842722e86703125 # clk: Add support parent clock in set_phase - 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - - 98599f0aa8efcf43299c95c392c868f74f69eda0 # clk: renesas: rcar-gen3: Add PLL clock and update z-clock for propagating frequency to parent - - 8be3f69874d57fc2bd3563b47ebca7fe189673b2 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider - 226e92814ca5b8ea1ce789869cee131c9bc2a819 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990 - 97a8cbaabb27ab9b53c345798e87ff5de155cf94 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST - 5a2c795936b78619f1f83ff89846efe7e63be2b3 # clk: renesas: rcar-gen3: Fix SCCG/Clean peripheral clocks definition @@ -54,6 +52,3 @@ bsp41x: - e7a6e866fad61e16703ab2433d848926a85f5a8b # clk: renesas: r8a779a0: Add RADSP clocks - 8a6d0d59a9d4d19a1853dd5d6b89b18bc635e348 # clk: renesas: r8a779a0: Add VCPL4 clock - 60151ad45b0ded0aacab6438fbf03631b0f1c14f # clk: renesas: r8a779a0: Add WWDT clocks - -comments: - - "98599f0aa8efcf43299c95c392c868f74f69eda0: We need to upport with refactoring." diff --git a/projects/linux/core/rcar3_cpufreq.yaml b/projects/linux/core/rcar3_cpufreq.yaml new file mode 100644 index 0000000..8cc8575 --- /dev/null +++ b/projects/linux/core/rcar3_cpufreq.yaml @@ -0,0 +1,16 @@ +title: "RCAR3: Enable full cpufreq and voltage scaling" +team: Core +key: fec11e8a-8245-11eb-840e-038316d558e6 +assignee: Geert +status: Active + +bsp41x: + - 98599f0aa8efcf43299c95c392c868f74f69eda0 # clk: renesas: rcar-gen3: Add PLL clock and update z-clock for propagating frequency to parent + - 8be3f69874d57fc2bd3563b47ebca7fe189673b2 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider + - f987b6914499838ec36a73d39c3d9849e418b33c # arm64: dts: h3ulcb: Add cpu-supply property in a57_0 node + - de2a18575b8350dfc9896851c0108a54cb4fb2d1 # arm64: dts: salvator-common: Add cpu-supply property in a57_0 node + +upstream: + +comments: + - "98599f0aa8efcf43299c95c392c868f74f69eda0: We need to upport with refactoring." |