diff options
| -rw-r--r-- | projects/linux/io/CMT-fix-timeouts.yaml | 7 | ||||
| -rw-r--r-- | projects/linux/io/I2C-add_RECV_LEN-support.yaml | 2 | ||||
| -rw-r--r-- | projects/linux/io/SDHI-remove-tasklets.yaml | 10 | ||||
| -rw-r--r-- | projects/linux/io/SDHI-upport-BSP-fixes.yaml | 19 | ||||
| -rw-r--r-- | projects/linux/io/TPU-proper-duty-cycle.yaml | 2 |
5 files changed, 37 insertions, 3 deletions
diff --git a/projects/linux/io/CMT-fix-timeouts.yaml b/projects/linux/io/CMT-fix-timeouts.yaml index 349661a..1cfb53c 100644 --- a/projects/linux/io/CMT-fix-timeouts.yaml +++ b/projects/linux/io/CMT-fix-timeouts.yaml @@ -1,10 +1,15 @@ title: CMT; fix timeouts when using testsuite team: IO +assignee: Wolfram key: f25b0e74-0db5-11ed-8be6-efac635d4dbc -status: New +status: Active upstream: + - lore: 20221118075152.19537-1-wsa+renesas@sang-engineering.com # [RFC PATCH v2] clocksource/drivers/sh_cmt: access registers according to spec comments: - we get timeout errors when using the 'clocksource-switch' test from the Kernel selftests - only Gen4 is affected + - intensive testing showed that Gen3 is affected, too. Just rarely, a lot less than Gen4 + - RFC v1 sent + - RFC v2 sent diff --git a/projects/linux/io/I2C-add_RECV_LEN-support.yaml b/projects/linux/io/I2C-add_RECV_LEN-support.yaml index d08e8b6..7f37912 100644 --- a/projects/linux/io/I2C-add_RECV_LEN-support.yaml +++ b/projects/linux/io/I2C-add_RECV_LEN-support.yaml @@ -2,7 +2,7 @@ title: I2C; add full RECV_LEN support to the i2c-rcar driver team: IO key: 3c3dd6fe-03d9-11eb-ad24-7782efa69bb6 assignee: Wolfram -status: Active +status: Paused upstream: - torvalds: bfb3939c51d51c0de794da14f33c13e36d2e4f3d # i2c: refactor documentation of struct i2c_msg diff --git a/projects/linux/io/SDHI-remove-tasklets.yaml b/projects/linux/io/SDHI-remove-tasklets.yaml new file mode 100644 index 0000000..b5e1683 --- /dev/null +++ b/projects/linux/io/SDHI-remove-tasklets.yaml @@ -0,0 +1,10 @@ +title: SDHI; remove tasklets in favor of threaded irqs +team: IO +key: a0a4cedc-5ae3-11ed-b66a-832df4541518 +status: New + +upstream: + +comments: + - MMC maintainer suggests to remove tasklets from TMIO/SDHI + - details at lore.kernel.org/r/CAPDyKFqA1RtcaGMCQgDsKKju4izHWJRAD12SqqirNm+TWLt_hA@mail.gmail.com diff --git a/projects/linux/io/SDHI-upport-BSP-fixes.yaml b/projects/linux/io/SDHI-upport-BSP-fixes.yaml index d0b655b..50f964f 100644 --- a/projects/linux/io/SDHI-upport-BSP-fixes.yaml +++ b/projects/linux/io/SDHI-upport-BSP-fixes.yaml @@ -26,6 +26,15 @@ upstream: - torvalds: 6af8dd53c36f3e400b60269d3b55bdcc0d0574f7 # mmc: renesas_sdhi: R-Car D3 also has no HS400 - torvalds: fc1fdbd94cabab0f647c80fbd5c41029f84735b4 # mmc: renesas_sdhi: R-Car V3M also has no HS400 - torvalds: f504dee2c63b93fddb2dc42f37971e9f36c021e7 # mmc: renesas_sdhi: R-Car V3H ES2.0 gained HS400 support + - next: f33261c369ba5b7e0de89a64146aaf6e62b1031f # mmc: renesas_sdhi: remove accessor function for internal_dmac + - next: 8da04ec403d22ab9e94fed1e76566cde4b2d311a # mmc: renesas_sdhi: improve naming of DMA struct + - next: dc0efb624b91fb70c4c500feb013d30d5f5060f2 # mmc: tmio: add callback for dma irq + - next: 8d95c9631faf79d4536fd1872a1da88781b4dc25 # mmc: renesas_sdhi: add quirk for broken register layout + - next: 8d901e2ba5667ea48b99b27a8d9c7faec37e6bb6 # mmc: renesas_sdhi: take DMA end interrupts into account + - lore: 20221120113457.42010-2-wsa+renesas@sang-engineering.com # [PATCH v2 1/4] mmc: renesas_sdhi: alway populate SCC pointer + - lore: 20221120113457.42010-3-wsa+renesas@sang-engineering.com # [PATCH v2 2/4] mmc: renesas_sdhi: better reset from HS400 mode + - lore: 20221120113457.42010-4-wsa+renesas@sang-engineering.com # [PATCH v2 3/4] mmc: renesas_sdhi: add helper to access quirks + - lore: 20221120113457.42010-5-wsa+renesas@sang-engineering.com # [PATCH v2 4/4] mmc: renesas_sdhi: use new convenience macro from MMC core comments: - 0237478dc67b71ff92082e06323c015631098b71, 1f8eaa32650a2f67cc318f39c603f2c8282831a4, ef716ad2e21ec228a138e1d22cc1c33e669e492b @@ -40,19 +49,29 @@ comments: - 5d60e36aaa96fa39d1a524cc4ff373c0f36616e0, 15d7abbfc3f0dae379821824135d94a4f865a449 - before calling 'renesas_sdhi_adjust_hs400_mode_disable()', change the if to 'if (gen3)'? + - refactored and sent v1 + - sent v2 - 73405fef502d43737be9a50d29935bee133fe7ab, 53c3958c01961421cd2b70c3dfebc9f391e00192 - Only for H3/M3-W ES1.0, but why does mainline work? - Shimoda-san said that old SoCs had issues with internal DMA end irq not at the same time as transfer end irq - current HW does not have these issues but to be future-proof, we still want to handle them individually + - heavily refactored and RFC sent + - tested and merged + - done - 20e5623df1aaa74301675122b910f063cdcabe7e, e54e9682fbc229e7a168d63b2e49bc174353caed - Why does mainline work without it? - Shimoda-san said that old SoCs had issues with internal DMA end irq not at the same time as transfer end irq - current HW does not have these issues but to be future-proof, we still want to handle them individually + - heavily refactored and RFC sent + - tested and merged + - done - 2d111ff70e13073395f33e989ca2ff63b4fb4d2e - why is it needed? + - to allow resetting the SCC in any case + - refactored and sent with v2 of reset-calibration-register fix - ef6598cafe54825b537f47df7846dbcacbc73e88 - can't find it in the docs that HS400 is not supported. But D3 has indeed no strobe pin which is needed diff --git a/projects/linux/io/TPU-proper-duty-cycle.yaml b/projects/linux/io/TPU-proper-duty-cycle.yaml index c0f891f..3b00d27 100644 --- a/projects/linux/io/TPU-proper-duty-cycle.yaml +++ b/projects/linux/io/TPU-proper-duty-cycle.yaml @@ -1,4 +1,4 @@ -title: V3U; upport TPU fixes and enable for V3U +title: upport TPU fixes team: IO key: d1945716-439b-11ec-a6f6-73ef622e1a31 status: New |