1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
|
/*
* Copyright 2005 Stephane Marchesin
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "drmP.h"
#include "drm.h"
#include "drm_sarea.h"
#include "nouveau_drv.h"
/* here a client dies, release the stuff that was allocated for its filp */
void nouveau_preclose(drm_device_t * dev, DRMFILE filp)
{
drm_nouveau_private_t *dev_priv = dev->dev_private;
nouveau_mem_release(filp,dev_priv->fb_heap);
nouveau_mem_release(filp,dev_priv->agp_heap);
nouveau_object_cleanup(dev, filp);
nouveau_fifo_cleanup(dev, filp);
}
/* first module load, setup the mmio/fb mapping */
int nouveau_firstopen(struct drm_device *dev)
{
int ret;
drm_nouveau_private_t *dev_priv = dev->dev_private;
/* resource 0 is mmio regs */
/* resource 1 is linear FB */
/* resource 2 is RAMIN (mmio regs + 0x1000000) */
/* resource 6 is bios */
/* map the mmio regs */
ret = drm_addmap(dev, drm_get_resource_start(dev, 0), drm_get_resource_len(dev, 0),
_DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->mmio);
if (dev_priv->mmio)
{
DRM_INFO("regs mapped ok at 0x%lx\n",dev_priv->mmio->offset);
}
else
{
DRM_ERROR("Unable to initialize the mmio mapping. Please report your setup to " DRIVER_EMAIL "\n");
return 1;
}
DRM_INFO("%lld MB of video ram detected\n",nouveau_mem_fb_amount(dev)>>20);
/* map larger RAMIN aperture on NV40 cards */
if (dev_priv->card_type >= NV_40) {
int ramin_resource = 2;
if (drm_get_resource_len(dev, ramin_resource) == 0)
ramin_resource = 3;
ret = drm_addmap(dev, drm_get_resource_start(dev, ramin_resource),
drm_get_resource_len(dev, ramin_resource),
_DRM_REGISTERS,
_DRM_READ_ONLY,
&dev_priv->ramin);
if (ret) {
DRM_ERROR("Failed to init RAMIN mapping, "
"limited instance memory available\n");
dev_priv->ramin = NULL;
}
} else
dev_priv->ramin = NULL;
/* Determine exact chipset we're running on */
if (dev_priv->card_type < NV_10)
dev_priv->chipset = dev_priv->card_type;
else
dev_priv->chipset =(NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20;
/* Clear RAMIN
* Determine locations for RAMHT/FC/RO
* Initialise PFIFO
*/
ret = nouveau_fifo_init(dev);
if (ret) return ret;
/* setup a mtrr over the FB */
dev_priv->fb_mtrr=drm_mtrr_add(drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC);
/* FIXME: doesn't belong here, and have no idea what it's for.. */
if (dev_priv->card_type >= NV_40)
nv40_graph_init(dev);
else if (dev_priv->card_type >= NV_30)
nv30_graph_init(dev);
else if (dev_priv->card_type >= NV_20)
nv20_graph_init(dev);
else if (dev_priv->card_type >= NV_10)
nv10_graph_init(dev);
return 0;
}
int nouveau_load(struct drm_device *dev, unsigned long flags)
{
drm_nouveau_private_t *dev_priv;
if (flags==NV_UNKNOWN)
return DRM_ERR(EINVAL);
dev_priv = drm_alloc(sizeof(drm_nouveau_private_t), DRM_MEM_DRIVER);
if (!dev_priv)
return DRM_ERR(ENOMEM);
memset(dev_priv, 0, sizeof(drm_nouveau_private_t));
dev_priv->card_type=flags&NOUVEAU_FAMILY;
dev_priv->flags=flags&NOUVEAU_FLAGS;
dev->dev_private = (void *)dev_priv;
return 0;
}
void nouveau_lastclose(struct drm_device *dev)
{
drm_nouveau_private_t *dev_priv = dev->dev_private;
if(dev_priv->fb_mtrr>0)
{
drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC);
dev_priv->fb_mtrr=0;
}
}
int nouveau_unload(struct drm_device *dev)
{
drm_free(dev->dev_private, sizeof(*dev->dev_private), DRM_MEM_DRIVER);
dev->dev_private = NULL;
return 0;
}
int nouveau_ioctl_getparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_nouveau_private_t *dev_priv = dev->dev_private;
drm_nouveau_getparam_t getparam;
DRM_COPY_FROM_USER_IOCTL(getparam, (drm_nouveau_getparam_t __user *)data,
sizeof(getparam));
switch (getparam.param) {
case NOUVEAU_GETPARAM_PCI_VENDOR:
getparam.value=dev->pci_vendor;
break;
case NOUVEAU_GETPARAM_PCI_DEVICE:
getparam.value=dev->pci_device;
break;
case NOUVEAU_GETPARAM_BUS_TYPE:
if (drm_device_is_agp(dev))
getparam.value=NV_AGP;
else if (drm_device_is_pcie(dev))
getparam.value=NV_PCIE;
else
getparam.value=NV_PCI;
break;
case NOUVEAU_GETPARAM_FB_PHYSICAL:
getparam.value=dev_priv->fb_phys;
break;
case NOUVEAU_GETPARAM_AGP_PHYSICAL:
getparam.value=dev_priv->agp_phys;
break;
default:
DRM_ERROR("unknown parameter %d\n", getparam.param);
return DRM_ERR(EINVAL);
}
DRM_COPY_TO_USER_IOCTL((drm_nouveau_getparam_t __user *)data, getparam,
sizeof(getparam));
return 0;
}
int nouveau_ioctl_setparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_nouveau_private_t *dev_priv = dev->dev_private;
drm_nouveau_setparam_t setparam;
DRM_COPY_FROM_USER_IOCTL(setparam, (drm_nouveau_setparam_t __user *)data,
sizeof(setparam));
switch (setparam.param) {
case NOUVEAU_SETPARAM_CMDBUF_LOCATION:
switch (setparam.value) {
case NOUVEAU_MEM_AGP:
case NOUVEAU_MEM_FB:
break;
default:
DRM_ERROR("invalid CMDBUF_LOCATION value=%d\n", setparam.value);
return DRM_ERR(EINVAL);
}
dev_priv->config.cmdbuf.location = setparam.value;
break;
case NOUVEAU_SETPARAM_CMDBUF_SIZE:
dev_priv->config.cmdbuf.size = setparam.value;
break;
default:
DRM_ERROR("unknown parameter %d\n", setparam.param);
return DRM_ERR(EINVAL);
}
return 0;
}
/* waits for idle */
void nouveau_wait_for_idle(struct drm_device *dev)
{
drm_nouveau_private_t *dev_priv=dev->dev_private;
switch(dev_priv->card_type)
{
case NV_03:
while(NV_READ(NV03_PGRAPH_STATUS));
break;
default:
while(NV_READ(NV04_PGRAPH_STATUS));
break;
}
}
|