/* * Copyright © 2006 Keith Packard * Copyright © 2007 Intel Corporation * Jesse Barnes */ #ifndef __DRM_CRTC_H__ #define __DRM_CRTC_H__ #include #include #include #include #include struct drm_device; /* * Note on terminology: here, for brevity and convenience, we refer to output * control chips as 'CRTCs'. They can control any type of output, VGA, LVDS, * DVI, etc. And 'screen' refers to the whole of the visible display, which * may span multiple monitors (and therefore multiple CRTC and output * structures). */ enum drm_mode_status { MODE_OK = 0, /* Mode OK */ MODE_HSYNC, /* hsync out of range */ MODE_VSYNC, /* vsync out of range */ MODE_H_ILLEGAL, /* mode has illegal horizontal timings */ MODE_V_ILLEGAL, /* mode has illegal horizontal timings */ MODE_BAD_WIDTH, /* requires an unsupported linepitch */ MODE_NOMODE, /* no mode with a maching name */ MODE_NO_INTERLACE, /* interlaced mode not supported */ MODE_NO_DBLESCAN, /* doublescan mode not supported */ MODE_NO_VSCAN, /* multiscan mode not supported */ MODE_MEM, /* insufficient video memory */ MODE_VIRTUAL_X, /* mode width too large for specified virtual size */ MODE_VIRTUAL_Y, /* mode height too large for specified virtual size */ MODE_MEM_VIRT, /* insufficient video memory given virtual size */ MODE_NOCLOCK, /* no fixed clock available */ MODE_CLOCK_HIGH, /* clock required is too high */ MODE_CLOCK_LOW, /* clock required is too low */ MODE_CLOCK_RANGE, /* clock/mode isn't in a ClockRange */ MODE_BAD_HVALUE, /* horizontal timing was out of range */ MODE_BAD_VVALUE, /* vertical timing was out of range */ MODE_BAD_VSCAN, /* VScan value out of range */ MODE_HSYNC_NARROW, /* horizontal sync too narrow */ MODE_HSYNC_WIDE, /* horizontal sync too wide */ MODE_HBLANK_NARROW, /* horizontal blanking too narrow */ MODE_HBLANK_WIDE, /* horizontal blanking too wide */ MODE_VSYNC_NARROW, /* vertical sync too narrow */ MODE_VSYNC_WIDE, /* vertical sync too wide */ MODE_VBLANK_NARROW, /* vertical blanking too narrow */ MODE_VBLANK_WIDE, /* vertical blanking too wide */ MODE_PANEL, /* exceeds panel dimensions */ MODE_INTERLACE_WIDTH, /* width too large for interlaced mode */ MODE_ONE_WIDTH, /* only one width is supported */ MODE_ONE_HEIGHT, /* only one height is supported */ MODE_ONE_SIZE, /* only one resolution is supported */ MODE_NO_REDUCED, /* monitor doesn't accept reduced blanking */ MODE_UNVERIFIED = -3, /* mode needs to reverified */ MODE_BAD = -2, /* unspecified reason */ MODE_ERROR = -1 /* error condition */ }; #define DRM_MODE_TYPE_CLOCK_CRTC_C (DRM_MODE_TYPE_CLOCK_C | \ DRM_MODE_TYPE_CRTC_C) #define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \ .name = nm, .status = 0, .type = (t), .clock = (c), \ .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \ .htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \ .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \ .vscan = (vs), .flags = (f), .vrefresh = 0 struct drm_display_mode { /* Header */ struct list_head head; char name[DRM_DISPLAY_MODE_LEN]; int mode_id; int output_count; enum drm_mode_status status; int type; /* Proposed mode values */ int clock; int hdisplay; int hsync_start; int hsync_end; int htotal; int hskew; int vdisplay; int vsync_start; int vsync_end; int vtotal; int vscan; unsigned int flags; /* Actual mode we give to hw */ int clock_index; int synth_clock; int crtc_hdisplay; int crtc_hblank_start; int crtc_hblank_end; int crtc_hsync_start; int crtc_hsync_end; int crtc_htotal; int crtc_hskew; int crtc_vdisplay; int crtc_vblank_start; int crtc_vblank_end; int crtc_vsync_start; int crtc_vsync_end; int crtc_vtotal; int crtc_hadjusted; int crtc_vadjusted; /* Driver private mode info */ int private_size; int *private; int private_flags; int vrefresh; float hsync; }; /* Video mode flags */ #define V_PHSYNC (1<<0) #define V_NHSYNC (1<<1) #define V_PVSYNC (1<<2) #define V_NVSYNC (1<<3) #define V_INTERLACE (1<<4) #define V_DBLSCAN (1<<5) #define V_CSYNC (1<<6) #define V_PCSYNC (1<<7) #define V_NCSYNC (1<<8) #define V_HSKEW (1<<9) /* hskew provided */ #define V_BCAST (1<<10) #define V_PIXMUX (1<<11) #define V_DBLCLK (1<<12) #define V_CLKDIV2 (1<<13) #define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */ #define DPMSModeOn 0 #define DPMSModeStandby 1 #define DPMSModeSuspend 2 #define DPMSModeOff 3 #define ConnectorUnknown 0 #define ConnectorVGA 1 #define ConnectorDVII 2 #define ConnectorDVID 3 #define ConnectorDVIA 4 #define ConnectorComposite 5 #define ConnectorSVIDEO 6 #define ConnectorLVDS 7 #define ConnectorComponent 8 #define Connector9PinDIN 9 #define ConnectorDisplayPort 10 #define ConnectorHDMIA 11 #define ConnectorHDMIB 12 enum drm_output_status { output_status_connected = 1, output_status_disconnected = 2, output_status_unknown = 3, }; enum subpixel_order { SubPixelUnknown = 0, SubPixelHorizontalRGB, SubPixelHorizontalBGR, SubPixelVerticalRGB, SubPixelVerticalBGR, SubPixelNone, }; /* * Describes a given display (e.g. CRT or flat panel) and its limitations. */ struct drm_display_info { char name[DRM_DISPLAY_INFO_LEN]; /* Input info */ bool serration_vsync; bool sync_on_green; bool composite_sync; bool separate_syncs; bool blank_to_black; unsigned char video_level; bool digital; /* Physical size */ unsigned int width_mm; unsigned int height_mm; /* Display parameters */ unsigned char gamma; /* FIXME: storage format */ bool gtf_supported; bool standard_color; enum { monochrome, rgb, other, unknown, } display_type; bool active_off_supported; bool suspend_supported; bool standby_supported; /* Color info FIXME: storage format */ unsigned short redx, redy; unsigned short greenx, greeny; unsigned short bluex, bluey; unsigned short whitex, whitey; /* Clock limits FIXME: storage format */ unsigned int min_vfreq, max_vfreq; unsigned int min_hfreq, max_hfreq; unsigned int pixel_clock; /* White point indices FIXME: storage format */ unsigned int wpx1, wpy1; unsigned int wpgamma1; unsigned int wpx2, wpy2; unsigned int wpgamma2; /* Preferred mode (if any) */ struct drm_display_mode *preferred_mode; char *raw_edid; /* if any */ }; struct drm_framebuffer { struct drm_device *dev; struct list_head head; int id; /* idr assigned */ unsigned int pitch; unsigned int width; unsigned int height; /* depth can be 15 or 16 */ unsigned int depth; int bits_per_pixel; int flags; struct drm_buffer_object *bo; void *fbdev; u32 pseudo_palette[17]; struct drm_bo_kmap_obj kmap; struct list_head filp_head; }; struct drm_property_blob { struct list_head head; unsigned int length; unsigned int id; void *data; }; struct drm_property_enum { uint64_t value; struct list_head head; char name[DRM_PROP_NAME_LEN]; }; struct drm_property { struct list_head head; int id; /* idr assigned */ uint32_t flags; char name[DRM_PROP_NAME_LEN]; uint32_t num_values; uint64_t *values; struct list_head enum_blob_list; }; struct drm_crtc; struct drm_output; /** * drm_crtc_funcs - control CRTCs for a given device * @dpms: control display power levels * @save: save CRTC state * @resore: restore CRTC state * @lock: lock the CRTC * @unlock: unlock the CRTC * @shadow_allocate: allocate shadow pixmap * @shadow_create: create shadow pixmap for rotation support * @shadow_destroy: free shadow pixmap * @mode_fixup: fixup proposed mode * @mode_set: set the desired mode on the CRTC * @gamma_set: specify color ramp for CRTC * @cleanup: cleanup driver private state prior to close * * The drm_crtc_funcs structure is the central CRTC management structure * in the DRM. Each CRTC controls one or more outputs (note that the name * CRTC is simply historical, a CRTC may control LVDS, VGA, DVI, TV out, etc. * outputs, not just CRTs). * * Each driver is responsible for filling out this structure at startup time, * in addition to providing other modesetting features, like i2c and DDC * bus accessors. */ struct drm_crtc_funcs { /* * Control power levels on the CRTC. If the mode passed in is * unsupported, the provider must use the next lowest power level. */ void (*dpms)(struct drm_crtc *crtc, int mode); /* JJJ: Are these needed? */ /* Save CRTC state */ void (*save)(struct drm_crtc *crtc); /* suspend? */ /* Restore CRTC state */ void (*restore)(struct drm_crtc *crtc); /* resume? */ bool (*lock)(struct drm_crtc *crtc); void (*unlock)(struct drm_crtc *crtc); void (*prepare)(struct drm_crtc *crtc); void (*commit)(struct drm_crtc *crtc); /* Provider can fixup or change mode timings before modeset occurs */ bool (*mode_fixup)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); /* Actually set the mode */ void (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y); /* Move the crtc on the current fb to the given position *optional* */ void (*mode_set_base)(struct drm_crtc *crtc, int x, int y); /* cursor controls */ int (*cursor_set)(struct drm_crtc *crtc, struct drm_buffer_object *bo, uint32_t width, uint32_t height); int (*cursor_move)(struct drm_crtc *crtc, int x, int y); /* Set gamma on the CRTC */ void (*gamma_set)(struct drm_crtc *crtc, u16 r, u16 g, u16 b, int regno); /* Driver cleanup routine */ void (*cleanup)(struct drm_crtc *crtc); }; /** * drm_crtc - central CRTC control structure * @enabled: is this CRTC enabled? * @x: x position on screen * @y: y position on screen * @desired_mode: new desired mode * @desired_x: desired x for desired_mode * @desired_y: desired y for desired_mode * @funcs: CRTC control functions * @driver_private: arbitrary driver data * * Each CRTC may have one or more outputs associated with it. This structure * allows the CRTC to be controlled. */ struct drm_crtc { struct drm_device *dev; struct list_head head; int id; /* idr assigned */ /* framebuffer the output is currently bound to */ struct drm_framebuffer *fb; bool enabled; /* JJJ: are these needed? */ bool cursor_in_range; bool cursor_shown; struct drm_display_mode mode; int x, y; struct drm_display_mode *desired_mode; int desired_x, desired_y; const struct drm_crtc_funcs *funcs; void *driver_private; /* RRCrtcPtr randr_crtc? */ }; extern struct drm_crtc *drm_crtc_create(struct drm_device *dev, const struct drm_crtc_funcs *funcs); /** * drm_output_funcs - control outputs on a given device * @init: setup this output * @dpms: set power state (see drm_crtc_funcs above) * @save: save output state * @restore: restore output state * @mode_valid: is this mode valid on the given output? * @mode_fixup: try to fixup proposed mode for this output * @mode_set: set this mode * @detect: is this output active? * @get_modes: get mode list for this output * @set_property: property for this output may need update * @cleanup: output is going away, cleanup * * Each CRTC may have one or more outputs attached to it. The functions * below allow the core DRM code to control outputs, enumerate available modes, * etc. */ struct drm_output_funcs { void (*init)(struct drm_output *output); void (*dpms)(struct drm_output *output, int mode); void (*save)(struct drm_output *output); void (*restore)(struct drm_output *output); int (*mode_valid)(struct drm_output *output, struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_output *output, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_output *output); void (*commit)(struct drm_output *output); void (*mode_set)(struct drm_output *output, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); enum drm_output_status (*detect)(struct drm_output *output); int (*get_modes)(struct drm_output *output); /* JJJ: type checking for properties via property value type */ bool (*set_property)(struct drm_output *output, struct drm_property *property, uint64_t val); void (*cleanup)(struct drm_output *output); }; #define DRM_OUTPUT_MAX_UMODES 16 #define DRM_OUTPUT_MAX_PROPERTY 16 #define DRM_OUTPUT_LEN 32 /** * drm_output - central DRM output control structure * @crtc: CRTC this output is currently connected to, NULL if none * @possible_crtcs: bitmap of CRTCS this output could be attached to * @possible_clones: bitmap of possible outputs this output could clone * @interlace_allowed: can this output handle interlaced modes? * @doublescan_allowed: can this output handle doublescan? * @available_modes: modes available on this output (from get_modes() + user) * @initial_x: initial x position for this output * @initial_y: initial y position for this output * @status: output connected? * @subpixel_order: for this output * @mm_width: displayable width of output in mm * @mm_height: displayable height of output in mm * @funcs: output control functions * @driver_private: private driver data * * Each output may be connected to one or more CRTCs, or may be clonable by * another output if they can share a CRTC. Each output also has a specific * position in the broader display (referred to as a 'screen' though it could * span multiple monitors). */ struct drm_output { struct drm_device *dev; struct list_head head; struct drm_crtc *crtc; int id; /* idr assigned */ int output_type; int output_type_id; unsigned long possible_crtcs; unsigned long possible_clones; bool interlace_allowed; bool doublescan_allowed; struct list_head modes; /* list of modes on this output */ /* OptionInfoPtr options; XF86ConfMonitorPtr conf_monitor; */ int initial_x, initial_y; enum drm_output_status status; /* these are modes added by probing with DDC or the BIOS */ struct list_head probed_modes; /* xf86MonPtr MonInfo; */ enum subpixel_order subpixel_order; int mm_width, mm_height; struct drm_display_info *monitor_info; /* if any */ const struct drm_output_funcs *funcs; void *driver_private; struct list_head user_modes; struct drm_property_blob *edid_blob_ptr; u32 property_ids[DRM_OUTPUT_MAX_PROPERTY]; uint64_t property_values[DRM_OUTPUT_MAX_PROPERTY]; }; /** * struct drm_mode_set * * Represents a single crtc the outputs that it drives with what mode * and from which framebuffer it scans out from. */ struct drm_mode_set { struct drm_framebuffer *fb; struct drm_crtc *crtc; struct drm_output **outputs; size_t num_outputs; }; /** * struct drm_mode_config_funcs - configure CRTCs for a given screen layout * @resize: adjust CRTCs as necessary for the proposed layout * * Currently only a resize hook is available. DRM will call back into the * driver with a new screen width and height. If the driver can't support * the proposed size, it can return false. Otherwise it should adjust * the CRTC<->output mappings as needed and update its view of the screen. */ struct drm_mode_config_funcs { bool (*resize)(struct drm_device *dev, int width, int height); }; /** * drm_mode_config - Mode configuration control structure * */ struct drm_mode_config { struct mutex mutex; /* protects configuration and IDR */ struct idr crtc_idr; /* use this idr for all IDs, fb, crtc, output, modes - just makes life easier */ /* this is limited to one for now */ int num_fb; struct list_head fb_list; int num_output; struct list_head output_list; /* int compat_output? */ int num_crtc; struct list_head crtc_list; struct list_head property_list; int min_width, min_height; int max_width, max_height; /* DamagePtr rotationDamage? */ /* DGA stuff? */ struct drm_mode_config_funcs *funcs; unsigned long fb_base; /* pointers to standard properties */ struct list_head property_blob_list; struct drm_property *edid_property; struct drm_property *dpms_property; struct drm_property *connector_type_property; struct drm_property *connector_num_property; /* TV properties */ struct drm_property *tv_mode_property; struct drm_property *tv_left_margin_property; struct drm_property *tv_right_margin_property; struct drm_property *tv_top_margin_property; struct drm_property *tv_bottom_margin_property; /* hotplug */ uint32_t hotplug_counter; }; struct drm_output *drm_output_create(struct drm_device *dev, const struct drm_output_funcs *funcs, int type); extern char *drm_get_output_name(struct drm_output *output); extern void drm_output_destroy(struct drm_output *output); extern void drm_fb_release(struct file *filp); extern struct edid *drm_get_edid(struct drm_output *output, struct i2c_adapter *adapter); extern int drm_add_edid_modes(struct drm_output *output, struct edid *edid); extern void drm_mode_probed_add(struct drm_output *output, struct drm_display_mode *mode); extern void drm_mode_remove(struct drm_output *output, struct drm_display_mode *mode); extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, struct drm_display_mode *mode); extern void drm_mode_debug_printmodeline(struct drm_device *dev, struct drm_display_mode *mode); extern void drm_mode_config_init(struct drm_device *dev); extern void drm_mode_config_cleanup(struct drm_device *dev); extern void drm_mode_set_name(struct drm_display_mode *mode); extern bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2); extern void drm_disable_unused_functions(struct drm_device *dev); /* for us by fb module */ extern int drm_mode_attachmode_crtc(struct drm_device *dev, struct drm_crtc *crtc, struct drm_display_mode *mode); extern int drm_mode_detachmode_crtc(struct drm_device *dev, struct drm_display_mode *mode); extern struct drm_display_mode *drm_mode_create(struct drm_device *dev); extern void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode); extern void drm_mode_list_concat(struct list_head *head, struct list_head *new); extern void drm_mode_validate_size(struct drm_device *dev, struct list_head *mode_list, int maxX, int maxY, int maxPitch); extern void drm_mode_prune_invalid(struct drm_device *dev, struct list_head *mode_list, bool verbose); extern void drm_mode_sort(struct list_head *mode_list); extern int drm_mode_vrefresh(struct drm_display_mode *mode); extern void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags); extern void drm_mode_output_list_update(struct drm_output *output); extern int drm_mode_output_update_edid_property(struct drm_output *output, struct edid *edid); extern int drm_output_property_set_value(struct drm_output *output, struct drm_property *property, uint64_t value); extern struct drm_display_mode *drm_crtc_mode_create(struct drm_device *dev); extern bool drm_initial_config(struct drm_device *dev, bool cangrow); extern void drm_framebuffer_set_object(struct drm_device *dev, unsigned long handle); extern struct drm_framebuffer *drm_framebuffer_create(struct drm_device *dev); extern void drm_framebuffer_destroy(struct drm_framebuffer *fb); extern int drmfb_probe(struct drm_device *dev, struct drm_crtc *crtc); extern int drmfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); extern bool drm_crtc_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y); extern int drm_hotplug_stage_two(struct drm_device *dev, struct drm_output *output, bool connected); extern int drm_output_attach_property(struct drm_output *output, struct drm_property *property, uint64_t init_val); extern struct drm_property *drm_property_create(struct drm_device *dev, int flags, const char *name, int num_values); extern void drm_property_destroy(struct drm_device *dev, struct drm_property *property); extern int drm_property_add_enum(struct drm_property *property, int index, uint64_t value, const char *name); /* IOCTLs */ extern int drm_mode_getresources(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_getcrtc(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_getoutput(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_setcrtc(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_cursor_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_addfb(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_rmfb(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_getfb(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_addmode_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_rmmode_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_attachmode_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_detachmode_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_getproperty_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_getblob_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_output_property_set_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_mode_hotplug_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); #endif /* __DRM_CRTC_H__ */ '#n572'>572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 
/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
 */
/* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

/**
 * \file mga_dma.c
 * DMA support for MGA G200 / G400.
 *
 * \author Rickard E. (Rik) Faith <faith@valinux.com>
 * \author Jeff Hartmann <jhartmann@valinux.com>
 * \author Keith Whitwell <keith@tungstengraphics.com>
 * \author Gareth Hughes <gareth@valinux.com>
 */

#include "drmP.h"
#include "drm.h"
#include "drm_sarea.h"
#include "mga_drm.h"
#include "mga_drv.h"

#define MGA_DEFAULT_USEC_TIMEOUT	10000
#define MGA_FREELIST_DEBUG		0

#define MINIMAL_CLEANUP    0
#define FULL_CLEANUP       1
static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);

/* ================================================================
 * Engine control
 */

int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
{
	u32 status = 0;
	int i;
	DRM_DEBUG("\n");

	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS) {
			MGA_WRITE8(MGA_CRTC_INDEX, 0);
			return 0;
		}
		DRM_UDELAY(1);
	}

#if MGA_DMA_DEBUG
	DRM_ERROR("failed!\n");
	DRM_INFO("   status=0x%08x\n", status);
#endif
	return -EBUSY;
}

static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
{
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;

	DRM_DEBUG("\n");

	/* The primary DMA stream should look like new right about now.
	 */
	primary->tail = 0;
	primary->space = primary->size;
	primary->last_flush = 0;

	sarea_priv->last_wrap = 0;

	/* FIXME: Reset counters, buffer ages etc...
	 */

	/* FIXME: What else do we need to reinitialize?  WARP stuff?
	 */

	return 0;
}

/* ================================================================
 * Primary DMA stream
 */

void mga_do_dma_flush(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	u32 status = 0;
	int i;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	/* We need to wait so that we can do an safe flush */
	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS)
			break;
		DRM_UDELAY(1);
	}

	if (primary->tail == primary->last_flush) {
		DRM_DEBUG("   bailing out...\n");
		return;
	}

	tail = primary->tail + dev_priv->primary->offset;

	/* We need to pad the stream between flushes, as the card
	 * actually (partially?) reads the first of these commands.
	 * See page 4-16 in the G400 manual, middle of the page or so.
	 */
	BEGIN_DMA(1);

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	primary->last_flush = primary->tail;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head <= tail) {
		primary->space = primary->size - primary->tail;
	} else {
		primary->space = head - tail;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06lx\n", tail - dev_priv->primary->offset);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	BEGIN_DMA_WRAP();

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	tail = primary->tail + dev_priv->primary->offset;

	primary->tail = 0;
	primary->last_flush = 0;
	primary->last_wrap++;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head == dev_priv->primary->offset) {
		primary->space = primary->size;
	} else {
		primary->space = head - dev_priv->primary->offset;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06x\n", primary->tail);
	DRM_DEBUG("   wrap = %d\n", primary->last_wrap);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	set_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	u32 head = dev_priv->primary->offset;
	DRM_DEBUG("\n");

	sarea_priv->last_wrap++;
	DRM_DEBUG("   wrap = %d\n", sarea_priv->last_wrap);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL);

	clear_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

/* ================================================================
 * Freelist management
 */

#define MGA_BUFFER_USED		~0
#define MGA_BUFFER_FREE		0

#if MGA_FREELIST_DEBUG
static void mga_freelist_print(struct drm_device * dev)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_freelist_t *entry;

	DRM_INFO("\n");
	DRM_INFO("current dispatch: last=0x%x done=0x%x\n",
		 dev_priv->sarea_priv->last_dispatch,
		 (unsigned int)(MGA_READ(MGA_PRIMADDRESS) -
				dev_priv->primary->offset));
	DRM_INFO("current freelist:\n");

	for (entry = dev_priv->head->next; entry; entry = entry->next) {
		DRM_INFO("   %p   idx=%2d  age=0x%x 0x%06lx\n",
			 entry, entry->buf->idx, entry->age.head,
			 entry->age.head - dev_priv->primary->offset);
	}
	DRM_INFO("\n");
}
#endif

static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv)
{
	struct drm_device_dma *dma = dev->dma;
	struct drm_buf *buf;
	drm_mga_buf_priv_t *buf_priv;
	drm_mga_freelist_t *entry;
	int i;
	DRM_DEBUG("count=%d\n", dma->buf_count);

	dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
	if (dev_priv->head == NULL)
		return -ENOMEM;

	memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
	SET_AGE(&dev_priv->head->age, MGA_BUFFER_USED, 0);

	for (i = 0; i < dma->buf_count; i++) {
		buf = dma->buflist[i];
		buf_priv = buf->dev_private;

		entry = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
		if (entry == NULL)
			return -ENOMEM;

		memset(entry, 0, sizeof(drm_mga_freelist_t));

		entry->next = dev_priv->head->next;
		entry->prev = dev_priv->head;
		SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
		entry->buf = buf;

		if (dev_priv->head->next != NULL)
			dev_priv->head->next->prev = entry;
		if (entry->next == NULL)
			dev_priv->tail = entry;

		buf_priv->list_entry = entry;
		buf_priv->discard = 0;
		buf_priv->dispatched = 0;

		dev_priv->head->next = entry;
	}

	return 0;
}

static void mga_freelist_cleanup(struct drm_device * dev)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_freelist_t *entry;
	drm_mga_freelist_t *next;
	DRM_DEBUG("\n");

	entry = dev_priv->head;
	while (entry) {
		next = entry->next;
		drm_free(entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
		entry = next;
	}

	dev_priv->head = dev_priv->tail = NULL;
}

#if 0
/* FIXME: Still needed?
 */
static void mga_freelist_reset(struct drm_device * dev)
{
	drm_device_dma_t *dma = dev->dma;
	struct drm_buf *buf;
	drm_mga_buf_priv_t *buf_priv;
	int i;

	for (i = 0; i < dma->buf_count; i++) {
		buf = dma->buflist[i];
		buf_priv = buf->dev_private;
		SET_AGE(&buf_priv->list_entry->age, MGA_BUFFER_FREE, 0);
	}
}
#endif

static struct drm_buf *mga_freelist_get(struct drm_device * dev)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_freelist_t *next;
	drm_mga_freelist_t *prev;
	drm_mga_freelist_t *tail = dev_priv->tail;
	u32 head, wrap;
	DRM_DEBUG("\n");

	head = MGA_READ(MGA_PRIMADDRESS);
	wrap = dev_priv->sarea_priv->last_wrap;

	DRM_DEBUG("   tail=0x%06lx %d\n",
		  tail->age.head ?
		  tail->age.head - dev_priv->primary->offset : 0,
		  tail->age.wrap);
	DRM_DEBUG("   head=0x%06lx %d\n",
		  head - dev_priv->primary->offset, wrap);

	if (TEST_AGE(&tail->age, head, wrap)) {
		prev = dev_priv->tail->prev;
		next = dev_priv->tail;
		prev->next = NULL;
		next->prev = next->next = NULL;
		dev_priv->tail = prev;
		SET_AGE(&next->age, MGA_BUFFER_USED, 0);
		return next->buf;
	}

	DRM_DEBUG("returning NULL!\n");
	return NULL;
}

int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
	drm_mga_freelist_t *head, *entry, *prev;

	DRM_DEBUG("age=0x%06lx wrap=%d\n",
		  buf_priv->list_entry->age.head -
		  dev_priv->primary->offset, buf_priv->list_entry->age.wrap);

	entry = buf_priv->list_entry;
	head = dev_priv->head;

	if (buf_priv->list_entry->age.head == MGA_BUFFER_USED) {
		SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
		prev = dev_priv->tail;
		prev->next = entry;
		entry->prev = prev;
		entry->next = NULL;
	} else {
		prev = head->next;
		head->next = entry;
		prev->prev = entry;
		entry->prev = head;
		entry->next = prev;
	}

	return 0;
}

/* ================================================================
 * DMA initialization, cleanup
 */

int mga_driver_load(struct drm_device *dev, unsigned long flags)
{
	drm_mga_private_t *dev_priv;

	dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
	if (!dev_priv)
		return -ENOMEM;

	dev->dev_private = (void *)dev_priv;
	memset(dev_priv, 0, sizeof(drm_mga_private_t));

	dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
	dev_priv->chipset = flags;

	dev_priv->mmio_base = drm_get_resource_start(dev, 1);
	dev_priv->mmio_size = drm_get_resource_len(dev, 1);

	dev->counters += 3;
	dev->types[6] = _DRM_STAT_IRQ;
	dev->types[7] = _DRM_STAT_PRIMARY;
	dev->types[8] = _DRM_STAT_SECONDARY;

	return 0;
}

/**
 * Bootstrap the driver for AGP DMA.
 *
 * \todo
 * Investigate whether there is any benifit to storing the WARP microcode in
 * AGP memory.  If not, the microcode may as well always be put in PCI
 * memory.
 *
 * \todo
 * This routine needs to set dma_bs->agp_mode to the mode actually configured
 * in the hardware.  Looking just at the Linux AGP driver code, I don't see
 * an easy way to determine this.
 *
 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
 */
static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
				    drm_mga_dma_bootstrap_t * dma_bs)
{
	drm_mga_private_t *const dev_priv =
		(drm_mga_private_t *)dev->dev_private;
	unsigned int warp_size = mga_warp_microcode_size(dev_priv);
	int err;
	unsigned offset;
	const unsigned secondary_size = dma_bs->secondary_bin_count
		* dma_bs->secondary_bin_size;
	const unsigned agp_size = (dma_bs->agp_size << 20);
	struct drm_buf_desc req;
	struct drm_agp_mode mode;
	struct drm_agp_info info;
	struct drm_agp_buffer agp_req;