From e326acf5493a7193954d3dd794855e2a11dc1782 Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Wed, 8 Aug 2007 22:55:32 +0200 Subject: nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry This should improve multi fifo --- shared-core/nv10_fifo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'shared-core') diff --git a/shared-core/nv10_fifo.c b/shared-core/nv10_fifo.c index 47af0ff0..a056460d 100644 --- a/shared-core/nv10_fifo.c +++ b/shared-core/nv10_fifo.c @@ -33,7 +33,7 @@ NV10_RAMFC_##offset/4, (val)) #define RAMFC_RD(offset) INSTANCE_RD(chan->ramfc->gpuobj, \ NV10_RAMFC_##offset/4) -#define NV10_RAMFC(c) (dev_priv->ramfc_offset + NV10_RAMFC__SIZE) +#define NV10_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV10_RAMFC__SIZE)) #define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32) int -- cgit v1.2.3