From b6b5df24b962c94433afe4d8665b5f145bfa1ad3 Mon Sep 17 00:00:00 2001 From: Thomas Hellstrom Date: Tue, 12 Jun 2007 12:21:38 +0200 Subject: Try to make buffer object / fence object ioctl args 64-bit safe. Introduce tile members for future tiled buffer support. Allow user-space to explicitly define a fence-class. Remove the implicit fence-class mechanism. 64-bit wide buffer object flag member. --- shared-core/drm.h | 103 +++++++++++++++++++++++++++++-------------------- shared-core/i915_drv.h | 4 +- shared-core/via_drv.h | 4 +- 3 files changed, 65 insertions(+), 46 deletions(-) (limited to 'shared-core') diff --git a/shared-core/drm.h b/shared-core/drm.h index ae308be6..bc2e718c 100644 --- a/shared-core/drm.h +++ b/shared-core/drm.h @@ -671,12 +671,13 @@ typedef struct drm_set_version { #define DRM_FENCE_TYPE_EXE 0x00000001 typedef struct drm_fence_arg { - unsigned handle; - int class; - unsigned type; - unsigned flags; - unsigned signaled; - unsigned expand_pad[4]; /*Future expansion */ + unsigned int handle; + unsigned int class; + unsigned int type; + unsigned int flags; + unsigned int signaled; + unsigned int pad_64; + drm_u64_t expand_pad[3]; /*Future expansion */ } drm_fence_arg_t; /* Buffer permissions, referring to how the GPU uses the buffers. @@ -685,9 +686,9 @@ typedef struct drm_fence_arg { * a command (batch-) buffer is exe. Can be or-ed together. */ -#define DRM_BO_FLAG_READ 0x00000001 -#define DRM_BO_FLAG_WRITE 0x00000002 -#define DRM_BO_FLAG_EXE 0x00000004 +#define DRM_BO_FLAG_READ (1ULL << 0) +#define DRM_BO_FLAG_WRITE (1ULL << 1) +#define DRM_BO_FLAG_EXE (1ULL << 2) /* * Status flags. Can be read to determine the actual state of a buffer. @@ -700,25 +701,25 @@ typedef struct drm_fence_arg { * or lock. * Flags: Acknowledge */ -#define DRM_BO_FLAG_NO_EVICT 0x00000010 +#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) /* * Mask: Require that the buffer is placed in mappable memory when validated. * If not set the buffer may or may not be in mappable memory when validated. * Flags: If set, the buffer is in mappable memory. */ -#define DRM_BO_FLAG_MAPPABLE 0x00000020 +#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) /* Mask: The buffer should be shareable with other processes. * Flags: The buffer is shareable with other processes. */ -#define DRM_BO_FLAG_SHAREABLE 0x00000040 +#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) /* Mask: If set, place the buffer in cache-coherent memory if available. * If clear, never place the buffer in cache coherent memory if validated. * Flags: The buffer is currently in cache-coherent memory. */ -#define DRM_BO_FLAG_CACHED 0x00000080 +#define DRM_BO_FLAG_CACHED (1ULL << 7) /* Mask: Make sure that every time this buffer is validated, * it ends up on the same location provided that the memory mask is the same. @@ -727,23 +728,23 @@ typedef struct drm_fence_arg { * part of buffer manager shutdown or locking. * Flags: Acknowledge. */ -#define DRM_BO_FLAG_NO_MOVE 0x00000100 +#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) /* Mask: Make sure the buffer is in cached memory when mapped for reading. * Flags: Acknowledge. */ -#define DRM_BO_FLAG_READ_CACHED 0x00080000 +#define DRM_BO_FLAG_READ_CACHED (1ULL << 16) /* Mask: Force DRM_BO_FLAG_CACHED flag strictly also if it is set. * Flags: Acknowledge. */ -#define DRM_BO_FLAG_FORCE_CACHING 0x00002000 +#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) /* * Mask: Force DRM_BO_FLAG_MAPPABLE flag strictly also if it is clear. * Flags: Acknowledge. */ -#define DRM_BO_FLAG_FORCE_MAPPABLE 0x00004000 +#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) /* * Memory type flags that can be or'ed together in the mask, but only @@ -751,21 +752,25 @@ typedef struct drm_fence_arg { */ /* System memory */ -#define DRM_BO_FLAG_MEM_LOCAL 0x01000000 +#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) /* Translation table memory */ -#define DRM_BO_FLAG_MEM_TT 0x02000000 +#define DRM_BO_FLAG_MEM_TT (1ULL << 25) /* Vram memory */ -#define DRM_BO_FLAG_MEM_VRAM 0x04000000 +#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) /* Up to the driver to define. */ -#define DRM_BO_FLAG_MEM_PRIV0 0x08000000 -#define DRM_BO_FLAG_MEM_PRIV1 0x10000000 -#define DRM_BO_FLAG_MEM_PRIV2 0x20000000 -#define DRM_BO_FLAG_MEM_PRIV3 0x40000000 -#define DRM_BO_FLAG_MEM_PRIV4 0x80000000 +#define DRM_BO_FLAG_MEM_PRIV0 (1ULL << 27) +#define DRM_BO_FLAG_MEM_PRIV1 (1ULL << 28) +#define DRM_BO_FLAG_MEM_PRIV2 (1ULL << 29) +#define DRM_BO_FLAG_MEM_PRIV3 (1ULL << 30) +#define DRM_BO_FLAG_MEM_PRIV4 (1ULL << 31) +/* We can add more of these now with a 64-bit flag type */ /* Memory flag mask */ -#define DRM_BO_MASK_MEM 0xFF000000 -#define DRM_BO_MASK_MEMTYPE 0xFF0000A0 +#define DRM_BO_MASK_MEM 0x00000000FF000000ULL +#define DRM_BO_MASK_MEMTYPE 0x00000000FF0000A0ULL + +/* Driver-private flags */ +#define DRM_BO_MASK_DRIVER 0xFFFF000000000000ULL /* Don't block on validate and map */ #define DRM_BO_HINT_DONT_BLOCK 0x00000002 @@ -774,6 +779,10 @@ typedef struct drm_fence_arg { #define DRM_BO_HINT_WAIT_LAZY 0x00000008 #define DRM_BO_HINT_ALLOW_UNFENCED_MAP 0x00000010 +#define DRM_BO_INIT_MAGIC 0xfe769812 +#define DRM_BO_INIT_MAJOR 0 +#define DRM_BO_INIT_MINOR 1 + typedef enum { drm_bo_type_dc, @@ -783,28 +792,30 @@ typedef enum { }drm_bo_type_t; struct drm_bo_info_req { - unsigned int handle; - unsigned int mask; + drm_u64_t mask; + drm_u64_t flags; + unsigned int handle; unsigned int hint; + unsigned int fence_class; }; struct drm_bo_create_req { - unsigned int mask; - unsigned int hint; - unsigned page_alignment; + drm_u64_t mask; drm_u64_t size; - drm_bo_type_t type; drm_u64_t buffer_start; + unsigned int hint; + unsigned int page_alignment; + drm_bo_type_t type; }; struct drm_bo_op_req { - struct drm_bo_info_req bo_req; - unsigned int arg_handle; enum { drm_bo_validate, drm_bo_fence, drm_bo_ref_fence, } op; + unsigned int arg_handle; + struct drm_bo_info_req bo_req; }; /* @@ -814,22 +825,26 @@ struct drm_bo_op_req { #define DRM_BO_REP_BUSY 0x00000001 struct drm_bo_info_rep { - unsigned int handle; - unsigned int flags; + drm_u64_t flags; + drm_u64_t mask; drm_u64_t size; drm_u64_t offset; drm_u64_t arg_handle; - unsigned int mask; drm_u64_t buffer_start; + unsigned int handle; unsigned int fence_flags; unsigned int rep_flags; unsigned int page_alignment; - unsigned int expand_pad[4]; /*Future expansion */ + unsigned int desired_tile_stride; + unsigned int hw_tile_stride; + unsigned int tile_info; + unsigned int pad64; + drm_u64_t expand_pad[4]; /*Future expansion */ }; struct drm_bo_arg_rep { - int ret; struct drm_bo_info_rep bo_info; + int ret; }; struct drm_bo_create_arg { @@ -859,6 +874,7 @@ struct drm_bo_map_wait_idle_arg { struct drm_bo_op_arg { int handled; + unsigned int pad_64; drm_u64_t next; union { struct drm_bo_op_req req; @@ -879,12 +895,15 @@ struct drm_bo_op_arg { typedef struct drm_mm_type_arg { unsigned int mem_type; -} drm_mm_type_arg_t; +} drm_mm_type_arg_t; typedef struct drm_mm_init_arg { + unsigned int magic; + unsigned int major; + unsigned int minor; + unsigned int mem_type; drm_u64_t p_offset; drm_u64_t p_size; - unsigned int mem_type; } drm_mm_init_arg_t; /** diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h index e8a7be29..52a958d9 100644 --- a/shared-core/i915_drv.h +++ b/shared-core/i915_drv.h @@ -196,8 +196,8 @@ extern int i915_fence_has_irq(drm_device_t *dev, uint32_t class, uint32_t flags) #ifdef I915_HAVE_BUFFER /* i915_buffer.c */ extern drm_ttm_backend_t *i915_create_ttm_backend_entry(drm_device_t *dev); -extern int i915_fence_types(drm_buffer_object_t *bo, uint32_t *class, uint32_t *type); -extern int i915_invalidate_caches(drm_device_t *dev, uint32_t buffer_flags); +extern int i915_fence_types(drm_buffer_object_t *bo, uint32_t *type); +extern int i915_invalidate_caches(drm_device_t *dev, uint64_t buffer_flags); extern int i915_init_mem_type(drm_device_t *dev, uint32_t type, drm_mem_type_manager_t *man); extern uint32_t i915_evict_mask(drm_buffer_object_t *bo); diff --git a/shared-core/via_drv.h b/shared-core/via_drv.h index baafbbff..b6dbf6c1 100644 --- a/shared-core/via_drv.h +++ b/shared-core/via_drv.h @@ -205,8 +205,8 @@ extern int via_fence_has_irq(struct drm_device * dev, uint32_t class, #ifdef VIA_HAVE_BUFFER extern drm_ttm_backend_t *via_create_ttm_backend_entry(drm_device_t *dev); -extern int via_fence_types(drm_buffer_object_t *bo, uint32_t *class, uint32_t *type); -extern int via_invalidate_caches(drm_device_t *dev, uint32_t buffer_flags); +extern int via_fence_types(drm_buffer_object_t *bo, uint32_t *type); +extern int via_invalidate_caches(drm_device_t *dev, uint64_t buffer_flags); extern int via_init_mem_type(drm_device_t *dev, uint32_t type, drm_mem_type_manager_t *man); extern uint32_t via_evict_mask(drm_buffer_object_t *bo); -- cgit v1.2.3