From 8e5f5ed189fa28e08e45274c15f8ed41f627bc8b Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 7 Oct 2008 04:47:54 +1000 Subject: radeon: PCIE cards don't appear to have explicit bus master --- shared-core/radeon_cp.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'shared-core') diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 72eb682d..c3b33a51 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -658,16 +658,12 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev, /* rs400, rs690/rs740 */ tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS; RADEON_WRITE(RADEON_BUS_CNTL, tmp); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || - ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423)) { - /* rv370/rv380, rv410, r423/r430/r480, r5xx */ - tmp = RADEON_READ(RV370_BUS_CNTL) & ~RV370_PMI_BM_DIS; - RADEON_WRITE(RV370_BUS_CNTL, tmp); - } else { + } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || + ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) { /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; RADEON_WRITE(RADEON_BUS_CNTL, tmp); - } + } /* PCIE cards appears to not need this */ dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0; RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame); -- cgit v1.2.3