From 3ac74f3208ed15a990a0a26742fbfe566f08aa80 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 2 May 2008 01:36:30 +1000 Subject: nv50: enable 0x400500 bit 0 after PGRAPH exception also No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :) --- shared-core/nouveau_irq.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'shared-core') diff --git a/shared-core/nouveau_irq.c b/shared-core/nouveau_irq.c index d002f642..2a3d8a0b 100644 --- a/shared-core/nouveau_irq.c +++ b/shared-core/nouveau_irq.c @@ -475,8 +475,12 @@ nv50_pgraph_irq_handler(struct drm_device *dev) NV_WRITE(NV03_PGRAPH_INTR, status); } - if ((NV_READ(0x400500) & (1 << 16)) == 0) - NV_WRITE(0x400500, NV_READ(0x400500) | (1 << 16)); + { + const int isb = (1 << 16) | (1 << 0); + + if ((NV_READ(0x400500) & isb) != isb) + NV_WRITE(0x400500, NV_READ(0x400500) | isb); + } NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING); } -- cgit v1.2.3