From 9f9a8f1382711a05ec000b639d971b619d8bc305 Mon Sep 17 00:00:00 2001 From: Jon Smirl Date: Thu, 30 Sep 2004 21:12:10 +0000 Subject: Lindent of core build. Drivers checked for no binary diffs. A few files weren't Lindent's because their comments didn't convert very well. A bunch of other minor clean up with no code implact included. --- shared-core/via_dma.c | 288 ++++++++++++++++++++++++-------------------------- 1 file changed, 137 insertions(+), 151 deletions(-) (limited to 'shared-core/via_dma.c') diff --git a/shared-core/via_dma.c b/shared-core/via_dma.c index 493c0b00..a48cb883 100644 --- a/shared-core/via_dma.c +++ b/shared-core/via_dma.c @@ -1,13 +1,13 @@ /* via_dma.c -- DMA support for the VIA Unichrome/Pro */ /************************************************************************** - * + * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. * All Rights Reserved. - * + * **************************************************************************/ #include "drmP.h" @@ -21,14 +21,14 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv); static void via_cmdbuf_pause(drm_via_private_t * dev_priv); static void via_cmdbuf_reset(drm_via_private_t * dev_priv); static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); -static int via_wait_idle(drm_via_private_t * dev_priv); +static int via_wait_idle(drm_via_private_t * dev_priv); static inline int via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) { uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; uint32_t cur_addr, hw_addr, next_addr; - volatile uint32_t * hw_addr_ptr; + volatile uint32_t *hw_addr_ptr; uint32_t count; hw_addr_ptr = dev_priv->hw_addr_ptr; cur_addr = agp_base + dev_priv->dma_low; @@ -38,12 +38,13 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) * a large 64KB window between buffer head and tail. */ next_addr = cur_addr + size + 64 * 1024; - count = 1000000; /* How long is this? */ + count = 1000000; /* How long is this? */ do { hw_addr = *hw_addr_ptr; if (count-- == 0) { - DRM_ERROR("via_cmdbuf_wait timed out hw %x dma_low %x\n", - hw_addr, dev_priv->dma_low); + DRM_ERROR + ("via_cmdbuf_wait timed out hw %x dma_low %x\n", + hw_addr, dev_priv->dma_low); return -1; } } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); @@ -56,8 +57,8 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) * * Returns virtual pointer to ring buffer. */ -static inline uint32_t * -via_check_dma(drm_via_private_t * dev_priv, unsigned int size) +static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, + unsigned int size) { if ((dev_priv->dma_low + size + 0x400) > dev_priv->dma_high) { via_cmdbuf_rewind(dev_priv); @@ -66,19 +67,19 @@ via_check_dma(drm_via_private_t * dev_priv, unsigned int size) return NULL; } - return (uint32_t*)(dev_priv->dma_ptr + dev_priv->dma_low); + return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); } -int via_dma_cleanup(drm_device_t *dev) +int via_dma_cleanup(drm_device_t * dev) { if (dev->dev_private) { - drm_via_private_t *dev_priv = - (drm_via_private_t *) dev->dev_private; + drm_via_private_t *dev_priv = + (drm_via_private_t *) dev->dev_private; if (dev_priv->ring.virtual_start) { via_cmdbuf_reset(dev_priv); - drm_core_ioremapfree( &dev_priv->ring.map, dev); + drm_core_ioremapfree(&dev_priv->ring.map, dev); dev_priv->ring.virtual_start = NULL; } } @@ -86,10 +87,9 @@ int via_dma_cleanup(drm_device_t *dev) return 0; } - -static int via_initialize(drm_device_t *dev, - drm_via_private_t *dev_priv, - drm_via_dma_init_t *init) +static int via_initialize(drm_device_t * dev, + drm_via_private_t * dev_priv, + drm_via_dma_init_t * init) { if (!dev_priv || !dev_priv->mmio) { DRM_ERROR("via_dma_init called before via_map_init\n"); @@ -98,7 +98,7 @@ static int via_initialize(drm_device_t *dev, if (dev_priv->ring.virtual_start != NULL) { DRM_ERROR("%s called again without calling cleanup\n", - __FUNCTION__); + __FUNCTION__); return DRM_ERR(EFAULT); } @@ -108,12 +108,12 @@ static int via_initialize(drm_device_t *dev, dev_priv->ring.map.flags = 0; dev_priv->ring.map.mtrr = 0; - drm_core_ioremap( &dev_priv->ring.map, dev ); + drm_core_ioremap(&dev_priv->ring.map, dev); if (dev_priv->ring.map.handle == NULL) { via_dma_cleanup(dev); DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); + " ring buffer\n"); return DRM_ERR(ENOMEM); } @@ -131,17 +131,17 @@ static int via_initialize(drm_device_t *dev, return 0; } - -int via_dma_init( DRM_IOCTL_ARGS ) +int via_dma_init(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; + drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; drm_via_dma_init_t init; int retcode = 0; - DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *)data, sizeof(init)); + DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data, + sizeof(init)); - switch(init.func) { + switch (init.func) { case VIA_INIT_DMA: retcode = via_initialize(dev, dev_priv, &init); break; @@ -156,12 +156,10 @@ int via_dma_init( DRM_IOCTL_ARGS ) return retcode; } - -static int via_dispatch_cmdbuffer(drm_device_t *dev, - drm_via_cmdbuffer_t *cmd ) +static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) { drm_via_private_t *dev_priv = dev->dev_private; - uint32_t * vb; + uint32_t *vb; vb = via_check_dma(dev_priv, cmd->size); if (vb == NULL) { return DRM_ERR(EAGAIN); @@ -175,8 +173,7 @@ static int via_dispatch_cmdbuffer(drm_device_t *dev, return 0; } - -static int via_quiescent(drm_device_t *dev) +static int via_quiescent(drm_device_t * dev) { drm_via_private_t *dev_priv = dev->dev_private; @@ -186,37 +183,35 @@ static int via_quiescent(drm_device_t *dev) return 0; } - -int via_flush_ioctl( DRM_IOCTL_ARGS ) +int via_flush_ioctl(DRM_IOCTL_ARGS) { DRM_DEVICE; - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("via_flush_ioctl called without lock held\n"); return DRM_ERR(EINVAL); } - return via_quiescent(dev); + return via_quiescent(dev); } - -int via_cmdbuffer( DRM_IOCTL_ARGS ) +int via_cmdbuffer(DRM_IOCTL_ARGS) { DRM_DEVICE; drm_via_cmdbuffer_t cmdbuf; int ret; - DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_via_cmdbuffer_t *)data, - sizeof(cmdbuf) ); + DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, + sizeof(cmdbuf)); DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size); - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("via_cmdbuffer called without lock held\n"); return DRM_ERR(EINVAL); } - ret = via_dispatch_cmdbuffer( dev, &cmdbuf ); + ret = via_dispatch_cmdbuffer(dev, &cmdbuf); if (ret) { return ret; } @@ -224,39 +219,39 @@ int via_cmdbuffer( DRM_IOCTL_ARGS ) return 0; } -static int via_parse_pci_cmdbuffer( drm_device_t *dev, const char *buf, - unsigned int size ) +static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf, + unsigned int size) { drm_via_private_t *dev_priv = dev->dev_private; uint32_t offset, value; - const uint32_t *regbuf = (uint32_t *)buf; + const uint32_t *regbuf = (uint32_t *) buf; unsigned int i; - size >>=3 ; - for (i=0; i>= 3; + for (i = 0; i < size; ++i) { + offset = *regbuf; regbuf += 2; - if ((offset > ((0x7FF >> 2) | VIA_2D_CMD)) && - (offset < ((0xC00 >> 2) | VIA_2D_CMD)) ) { + if ((offset > ((0x7FF >> 2) | VIA_2D_CMD)) && + (offset < ((0xC00 >> 2) | VIA_2D_CMD))) { DRM_DEBUG("Attempt to access Burst Command Area.\n"); - return DRM_ERR( EINVAL ); + return DRM_ERR(EINVAL); } else if (offset > ((0xDFF >> 2) | VIA_2D_CMD)) { DRM_DEBUG("Attempt to access DMA or VGA registers.\n"); - return DRM_ERR( EINVAL ); + return DRM_ERR(EINVAL); } } - - regbuf = (uint32_t *)buf; - for ( i=0; idev_private; char *hugebuf; @@ -269,42 +264,42 @@ static int via_dispatch_pci_cmdbuffer(drm_device_t *dev, * Small buffers must, on the other hand be handled fast. */ - if ( cmd->size > VIA_MAX_PCI_SIZE ) { - return DRM_ERR( ENOMEM ); - } else if ( cmd->size > VIA_PREALLOCATED_PCI_SIZE ) { - if (NULL == (hugebuf = (char *) kmalloc( cmd-> size, GFP_KERNEL ))) - return DRM_ERR( ENOMEM ); - if (DRM_COPY_FROM_USER( hugebuf, cmd->buf, cmd->size )) + if (cmd->size > VIA_MAX_PCI_SIZE) { + return DRM_ERR(ENOMEM); + } else if (cmd->size > VIA_PREALLOCATED_PCI_SIZE) { + if (NULL == (hugebuf = (char *)kmalloc(cmd->size, GFP_KERNEL))) + return DRM_ERR(ENOMEM); + if (DRM_COPY_FROM_USER(hugebuf, cmd->buf, cmd->size)) return DRM_ERR(EFAULT); - ret = via_parse_pci_cmdbuffer( dev, hugebuf, cmd->size ); - kfree( hugebuf ); + ret = via_parse_pci_cmdbuffer(dev, hugebuf, cmd->size); + kfree(hugebuf); } else { - if (DRM_COPY_FROM_USER( dev_priv->pci_buf, cmd->buf, cmd->size )) + if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) return DRM_ERR(EFAULT); - ret = via_parse_pci_cmdbuffer( dev, dev_priv->pci_buf, cmd->size ); + ret = + via_parse_pci_cmdbuffer(dev, dev_priv->pci_buf, cmd->size); } return ret; } - - -int via_pci_cmdbuffer( DRM_IOCTL_ARGS ) +int via_pci_cmdbuffer(DRM_IOCTL_ARGS) { DRM_DEVICE; drm_via_cmdbuffer_t cmdbuf; int ret; - DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_via_cmdbuffer_t *)data, - sizeof(cmdbuf) ); + DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, + sizeof(cmdbuf)); - DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size); + DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf, + cmdbuf.size); - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("via_pci_cmdbuffer called without lock held\n"); return DRM_ERR(EINVAL); } - ret = via_dispatch_pci_cmdbuffer( dev, &cmdbuf ); + ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf); if (ret) { return ret; } @@ -312,9 +307,6 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS ) return 0; } - - - /************************************************************************/ #include "via_3d_reg.h" @@ -325,13 +317,12 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS ) #define VIA_REG_STATUS 0x400 #define VIA_REG_TRANSET 0x43C #define VIA_REG_TRANSPACE 0x440 - -/* VIA_REG_STATUS(0x400): Engine Status */ -#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ -#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ -#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ -#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ +/* VIA_REG_STATUS(0x400): Engine Status */ +#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ +#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ +#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ +#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ #define SetReg2DAGP(nReg, nData) { \ *((uint32_t *)(vb)) = ((nReg) >> 2) | 0xF0000000; \ @@ -342,10 +333,10 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS ) static uint32_t via_swap_count = 0; -static inline uint32_t * -via_align_buffer(drm_via_private_t * dev_priv, uint32_t * vb, int qw_count) +static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, + uint32_t * vb, int qw_count) { - for ( ; qw_count > 0; --qw_count) { + for (; qw_count > 0; --qw_count) { *vb++ = (0xcc000000 | (dev_priv->dma_low & 0xffffff)); *vb++ = (0xdd400000 | via_swap_count); dev_priv->dma_low += 8; @@ -359,29 +350,28 @@ via_align_buffer(drm_via_private_t * dev_priv, uint32_t * vb, int qw_count) * * Returns virtual pointer to ring buffer. */ -static inline uint32_t * via_get_dma(drm_via_private_t * dev_priv) +static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) { - return (uint32_t*)(dev_priv->dma_ptr + dev_priv->dma_low); + return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); } - static int via_wait_idle(drm_via_private_t * dev_priv) { int count = 10000000; while (count-- && (VIA_READ(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY))); + (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | + VIA_3D_ENG_BUSY))) ; return count; } -static inline void -via_dummy_bitblt(drm_via_private_t * dev_priv) +static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) { - uint32_t * vb = via_get_dma(dev_priv); - /* GEDST*/ + uint32_t *vb = via_get_dma(dev_priv); + /* GEDST */ SetReg2DAGP(0x0C, (0 | (0 << 16))); - /* GEWD*/ + /* GEWD */ SetReg2DAGP(0x10, 0 | (0 << 16)); - /* BITBLT*/ + /* BITBLT */ SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); } @@ -393,7 +383,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) uint32_t end_addr, end_addr_lo; uint32_t qw_pad_count; uint32_t command; - uint32_t * vb; + uint32_t *vb; dev_priv->dma_low = 0; vb = via_get_dma(dev_priv); @@ -405,28 +395,27 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF)); end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | - ((end_addr & 0xff000000) >> 16)); + ((end_addr & 0xff000000) >> 16)); - *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) | - (VIA_REG_TRANSPACE>>2); - *vb++ = (HC_ParaType_PreCR<<16); + *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | + (VIA_REG_TRANSPACE >> 2); + *vb++ = (HC_ParaType_PreCR << 16); dev_priv->dma_low += 8; - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); + qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - + ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3); - pause_addr_lo = ((HC_SubA_HAGPBpL<<24) | - HC_HAGPBpID_PAUSE | - (pause_addr & 0xffffff)); - pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24)); + pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); + pause_addr_lo = ((HC_SubA_HAGPBpL << 24) | + HC_HAGPBpID_PAUSE | (pause_addr & 0xffffff)); + pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24)); - vb = via_align_buffer(dev_priv, vb, qw_pad_count-1); + vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); *vb++ = pause_addr_hi; *vb++ = pause_addr_lo; dev_priv->dma_low += 8; - dev_priv->last_pause_ptr = vb-1; + dev_priv->last_pause_ptr = vb - 1; VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); VIA_WRITE(VIA_REG_TRANSPACE, command); @@ -445,7 +434,7 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) uint32_t pause_addr, pause_addr_lo, pause_addr_hi; uint32_t start_addr; uint32_t end_addr, end_addr_lo; - uint32_t * vb; + uint32_t *vb; uint32_t qw_pad_count; uint32_t command; uint32_t jump_addr, jump_addr_lo, jump_addr_hi; @@ -459,38 +448,37 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) via_cmdbuf_wait(dev_priv, 48); via_dummy_bitblt(dev_priv); - via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE); + via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE); /* At end of buffer, rewind with a JUMP command. */ vb = via_get_dma(dev_priv); - *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) | - (VIA_REG_TRANSPACE>>2); - *vb++ = (HC_ParaType_PreCR<<16); + *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | + (VIA_REG_TRANSPACE >> 2); + *vb++ = (HC_ParaType_PreCR << 16); dev_priv->dma_low += 8; - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); + qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - + ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; start_addr = agp_base; - end_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3); + end_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); jump_addr = end_addr; - jump_addr_lo = ((HC_SubA_HAGPBpL<<24) | HC_HAGPBpID_JUMP | + jump_addr_lo = ((HC_SubA_HAGPBpL << 24) | HC_HAGPBpID_JUMP | (jump_addr & 0xffffff)); - jump_addr_hi = ((HC_SubA_HAGPBpH<<24) | (jump_addr >> 24)); + jump_addr_hi = ((HC_SubA_HAGPBpH << 24) | (jump_addr >> 24)); end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | - ((end_addr & 0xff000000) >> 16)); + ((end_addr & 0xff000000) >> 16)); *vb++ = command; *vb++ = end_addr_lo; dev_priv->dma_low += 8; - vb = via_align_buffer(dev_priv, vb, qw_pad_count-1); - + vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); /* Now at beginning of buffer, make sure engine will pause here. */ dev_priv->dma_low = 0; @@ -503,19 +491,19 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | - ((end_addr & 0xff000000) >> 16)); + ((end_addr & 0xff000000) >> 16)); - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); + qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - + ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3); - pause_addr_lo = ((HC_SubA_HAGPBpL<<24) | HC_HAGPBpID_PAUSE | - (pause_addr & 0xffffff)); - pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24)); + pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); + pause_addr_lo = ((HC_SubA_HAGPBpL << 24) | HC_HAGPBpID_PAUSE | + (pause_addr & 0xffffff)); + pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24)); - *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) | - (VIA_REG_TRANSPACE>>2); - *vb++ = (HC_ParaType_PreCR<<16); + *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | + (VIA_REG_TRANSPACE >> 2); + *vb++ = (HC_ParaType_PreCR << 16); dev_priv->dma_low += 8; *vb++ = pause_addr_hi; @@ -533,7 +521,7 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) dev_priv->dma_low += 8; *dev_priv->last_pause_ptr = jump_addr_lo; - dev_priv->last_pause_ptr = vb-1; + dev_priv->last_pause_ptr = vb - 1; if (VIA_READ(0x41c) & 0x80000000) { VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); @@ -552,33 +540,33 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) { uint32_t agp_base; uint32_t pause_addr, pause_addr_lo, pause_addr_hi; - uint32_t * vb; + uint32_t *vb; uint32_t qw_pad_count; via_cmdbuf_wait(dev_priv, 0x200); vb = via_get_dma(dev_priv); - *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) | - (VIA_REG_TRANSPACE>>2); - *vb++ = (HC_ParaType_PreCR<<16); + *vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | + (VIA_REG_TRANSPACE >> 2); + *vb++ = (HC_ParaType_PreCR << 16); dev_priv->dma_low += 8; agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); + qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - + ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3); - pause_addr_lo = ((HC_SubA_HAGPBpL<<24) | cmd_type | - (pause_addr & 0xffffff)); - pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24)); + pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); + pause_addr_lo = ((HC_SubA_HAGPBpL << 24) | cmd_type | + (pause_addr & 0xffffff)); + pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24)); - vb = via_align_buffer(dev_priv, vb, qw_pad_count-1); + vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); *vb++ = pause_addr_hi; *vb++ = pause_addr_lo; dev_priv->dma_low += 8; *dev_priv->last_pause_ptr = pause_addr_lo; - dev_priv->last_pause_ptr = vb-1; + dev_priv->last_pause_ptr = vb - 1; if (VIA_READ(0x41c) & 0x80000000) { VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); @@ -597,5 +585,3 @@ static void via_cmdbuf_reset(drm_via_private_t * dev_priv) via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); via_wait_idle(dev_priv); } - -/************************************************************************/ -- cgit v1.2.3