From ff25e7016c74ed0be5d47be5bf1937335da2bbf4 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Mon, 28 Oct 2002 19:05:40 +0000 Subject: merge from mesa-4-1-branch to get cube-map registers. bumped version to 1.7 --- shared-core/radeon_state.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'shared-core/radeon_state.c') diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c index 179a2202..b4d66524 100644 --- a/shared-core/radeon_state.c +++ b/shared-core/radeon_state.c @@ -279,6 +279,18 @@ static struct { { R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL" }, { R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE" }, { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" }, + { R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0" }, /* 61 */ + { R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0" }, /* 62 */ + { R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1" }, + { R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1" }, + { R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2" }, + { R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2" }, + { R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3" }, + { R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3" }, + { R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4" }, + { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" }, + { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" }, + { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" }, }; @@ -1792,11 +1804,16 @@ static int radeon_emit_packets( drm_radeon_cmd_buffer_t *cmdbuf ) { int id = (int)header.packet.packet_id; - int sz = packet[id].len; - int reg = packet[id].start; + int sz, reg; int *data = (int *)cmdbuf->buf; RING_LOCALS; + if (id >= RADEON_MAX_STATE_PACKETS) + return DRM_ERR(EINVAL); + + sz = packet[id].len; + reg = packet[id].start; + if (sz * sizeof(int) > cmdbuf->bufsz) return DRM_ERR(EINVAL); -- cgit v1.2.3