From 43c3223de690b892759901386d8dc936b0dfbad1 Mon Sep 17 00:00:00 2001 From: Roland Scheidegger Date: Wed, 26 Jan 2005 17:48:59 +0000 Subject: (Stephane Marchesin,me) Add radeon framebuffer tiling support to radeon drm. Add new ioctls to manage surfaces which cover the tiled areas --- shared-core/radeon_drv.h | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'shared-core/radeon_drv.h') diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index 30c3bcb6..bb1d30b2 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -42,7 +42,7 @@ #define DRIVER_NAME "radeon" #define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20041207" +#define DRIVER_DATE "20050125" /* Interface history: * @@ -80,10 +80,12 @@ * (No 3D support yet - just microcode loading). * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters * - Add hyperz support, add hyperz flags to clear ioctl. + * 1.14- Add support for color tiling + * - Add R100/R200 surface allocation/free support */ #define DRIVER_MAJOR 1 -#define DRIVER_MINOR 13 +#define DRIVER_MINOR 14 #define DRIVER_PATCHLEVEL 0 enum radeon_family { @@ -163,6 +165,21 @@ struct mem_block { DRMFILE filp; /* 0: free, -1: heap, other: real files */ }; +struct radeon_surface { + int refcount; + u32 lower; + u32 upper; + u32 flags; +}; + +struct radeon_virt_surface { + int surface_index; + u32 lower; + u32 upper; + u32 flags; + DRMFILE filp; +}; + typedef struct drm_radeon_private { drm_radeon_ring_buffer_t ring; @@ -241,8 +258,12 @@ typedef struct drm_radeon_private { wait_queue_head_t swi_queue; atomic_t swi_emitted; + struct radeon_surface surfaces[RADEON_MAX_SURFACES]; + struct radeon_virt_surface virt_surfaces[2*RADEON_MAX_SURFACES]; + /* starting from here on, data is preserved accross an open */ uint32_t flags; /* see radeon_chip_flags */ + #ifdef __linux__ struct radeon_i2c_chan i2c[4]; #endif /* __linux__ */ @@ -291,6 +312,8 @@ extern int radeon_mem_free(DRM_IOCTL_ARGS); extern int radeon_mem_init_heap(DRM_IOCTL_ARGS); extern void radeon_mem_takedown(struct mem_block **heap); extern void radeon_mem_release(DRMFILE filp, struct mem_block *heap); +extern int radeon_surface_alloc(DRM_IOCTL_ARGS); +extern int radeon_surface_free(DRM_IOCTL_ARGS); /* radeon_irq.c */ extern int radeon_irq_emit(DRM_IOCTL_ARGS); @@ -570,6 +593,7 @@ extern void radeon_driver_free_filp_priv(drm_device_t * dev, # define RADEON_SURF_TILE_MODE_16BIT_Z (3 << 16) #define RADEON_SURFACE0_LOWER_BOUND 0x0b04 #define RADEON_SURFACE0_UPPER_BOUND 0x0b08 +# define RADEON_SURF_ADDRESS_FIXED_MASK (0x3ff << 0) #define RADEON_SURFACE1_INFO 0x0b1c #define RADEON_SURFACE1_LOWER_BOUND 0x0b14 #define RADEON_SURFACE1_UPPER_BOUND 0x0b18 -- cgit v1.2.3