From ce58e53a01e61818210ebf65623e35a3af20167b Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 8 May 2007 15:43:29 +1000 Subject: whitespace fixups from kernel --- shared-core/radeon_cp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'shared-core/radeon_cp.c') diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index bde98b30..023ae933 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1391,8 +1391,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) DRM_DEBUG("\n"); /* if we require new memory map but we don't have it fail */ - if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) - { + if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) { DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n"); radeon_do_cleanup_cp(dev); return DRM_ERR(EINVAL); -- cgit v1.2.3 From 4e9d215bdfe72588cbacdb17ab9b60a42a43aefb Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 3 Jun 2007 16:28:21 +1000 Subject: radeon: add support for vblank on crtc2 This add support for CRTC2 vblank on radeon similiar to the i915 support --- shared-core/radeon_cp.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'shared-core/radeon_cp.c') diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 023ae933..e9c635d7 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1423,6 +1423,10 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) return DRM_ERR(EINVAL); } + /* Enable vblank on CRTC1 for older X servers + */ + dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1; + switch(init->func) { case RADEON_INIT_R200_CP: dev_priv->microcode_version = UCODE_R200; -- cgit v1.2.3 From 31815730732a5d2a446aa316a5b4d837766762e6 Mon Sep 17 00:00:00 2001 From: Oliver McFadden Date: Fri, 8 Jun 2007 19:40:57 +0000 Subject: r300: Added the CP maximum fetch size and ring rptr update variables. --- shared-core/radeon_cp.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'shared-core/radeon_cp.c') diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index e9c635d7..ec2e688b 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1190,9 +1190,15 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev, /* Set ring buffer size */ #ifdef __BIG_ENDIAN RADEON_WRITE(RADEON_CP_RB_CNTL, - dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT); + RADEON_BUF_SWAP_32BIT | + (dev_priv->ring.fetch_size_l2ow << 18) | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); #else - RADEON_WRITE(RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw); + RADEON_WRITE(RADEON_CP_RB_CNTL, + (dev_priv->ring.fetch_size_l2ow << 18) | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); #endif /* Start with assuming that writeback doesn't work */ @@ -1666,6 +1672,12 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) dev_priv->ring.size = init->ring_size; dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8); + dev_priv->ring.rptr_update = /* init->rptr_update */ 4096; + dev_priv->ring.rptr_update_l2qw = drm_order( /* init->rptr_update */ 4096 / 8); + + dev_priv->ring.fetch_size = /* init->fetch_size */ 32; + dev_priv->ring.fetch_size_l2ow = drm_order( /* init->fetch_size */ 32 / 16); + dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK; -- cgit v1.2.3