From 188a93c9dfde31de4d86733fa46b50487d3a4ac0 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 4 Mar 2007 19:10:46 +1100 Subject: radeon: make PCI GART aperture size variable, but making table size variable This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0 --- shared-core/radeon_cp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'shared-core/radeon_cp.c') diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 976b9fbd..e02796e7 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1622,9 +1622,8 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) } else #endif { - dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; /* if we have an offset set from userspace */ - if (dev_priv->pcigart_offset) { + if (dev_priv->pcigart_offset_set) { dev_priv->gart_info.bus_addr = dev_priv->pcigart_offset + dev_priv->fb_location; dev_priv->gart_info.mapping.offset = @@ -2231,6 +2230,8 @@ int radeon_driver_firstopen(struct drm_device *dev) drm_local_map_t *map; drm_radeon_private_t *dev_priv = dev->dev_private; + dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; + ret = drm_addmap(dev, drm_get_resource_start(dev, 2), drm_get_resource_len(dev, 2), _DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->mmio); -- cgit v1.2.3