From 5ec64d4a30ff6170e8b9f87fa52fd9cc0b5ddb9c Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 21 Nov 2007 13:02:19 +1000 Subject: r500: suggestion from glisse to not add cliprect offset on r5xx --- shared-core/r300_cmdbuf.c | 32 ++++++++++++++++++++------------ 1 file changed, 20 insertions(+), 12 deletions(-) (limited to 'shared-core/r300_cmdbuf.c') diff --git a/shared-core/r300_cmdbuf.c b/shared-core/r300_cmdbuf.c index 6ab907c6..c68f184b 100644 --- a/shared-core/r300_cmdbuf.c +++ b/shared-core/r300_cmdbuf.c @@ -77,23 +77,31 @@ static int r300_emit_cliprects(drm_radeon_private_t *dev_priv, return -EFAULT; } - box.x1 = - (box.x1 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.y1 = - (box.y1 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.x2 = - (box.x2 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.y2 = - (box.y2 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { + box.x1 = (box.x1) & + R300_CLIPRECT_MASK; + box.y1 = (box.y1) & + R300_CLIPRECT_MASK; + box.x2 = (box.x2) & + R300_CLIPRECT_MASK; + box.y2 = (box.y2) & + R300_CLIPRECT_MASK; + } else { + box.x1 = (box.x1 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.y1 = (box.y1 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.x2 = (box.x2 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.y2 = (box.y2 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + } OUT_RING((box.x1 << R300_CLIPRECT_X_SHIFT) | (box.y1 << R300_CLIPRECT_Y_SHIFT)); OUT_RING((box.x2 << R300_CLIPRECT_X_SHIFT) | (box.y2 << R300_CLIPRECT_Y_SHIFT)); + } OUT_RING_REG(R300_RE_CLIPRECT_CNTL, r300_cliprect_cntl[nr - 1]); -- cgit v1.2.3 From e51b3c8ff4bb88bc0f57473b7c3fe7fcd6b1a916 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 27 Nov 2007 08:43:14 +1000 Subject: r500: add a bunch of all r5xx pci ids.. fix up a range that may be needed for r500 mesa --- shared-core/r300_cmdbuf.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'shared-core/r300_cmdbuf.c') diff --git a/shared-core/r300_cmdbuf.c b/shared-core/r300_cmdbuf.c index c68f184b..a26a71d5 100644 --- a/shared-core/r300_cmdbuf.c +++ b/shared-core/r300_cmdbuf.c @@ -141,9 +141,11 @@ static int r300_emit_cliprects(drm_radeon_private_t *dev_priv, static u8 r300_reg_flags[0x10000 >> 2]; -void r300_init_reg_flags(void) +void r300_init_reg_flags(struct drm_device *dev) { int i; + drm_radeon_private_t *dev_priv = dev->dev_private; + memset(r300_reg_flags, 0, 0x10000 >> 2); #define ADD_RANGE_MARK(reg, count,mark) \ for(i=((reg)>>2);i<((reg)>>2)+(count);i++)\ @@ -238,6 +240,9 @@ void r300_init_reg_flags(void) ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8); ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { + ADD_RANGE(0x4074, 16); + } } static __inline__ int r300_check_range(unsigned reg, int count) -- cgit v1.2.3