From ee4ac5c897faa499ad24c148b4f065bc770b529d Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 28 Jan 2007 23:48:33 +1100 Subject: nouveau: determine chipset type at startup, instead of every time we use it. --- shared-core/nv40_graph.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'shared-core/nv40_graph.c') diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 00583cdc..71434e5b 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -611,10 +611,9 @@ nv40_graph_context_create(drm_device_t *dev, int channel) struct nouveau_fifo *chan = &dev_priv->fifos[channel]; void (*ctx_init)(drm_device_t *, struct mem_block *); unsigned int ctx_size; - int i, chipset; + int i; - chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20; - switch (chipset) { + switch (dev_priv->chipset) { case 0x40: ctx_size = NV40_GRCTX_SIZE; ctx_init = nv40_graph_context_init; @@ -896,17 +895,16 @@ nv40_graph_init(drm_device_t *dev) (drm_nouveau_private_t *)dev->dev_private; uint32_t *ctx_voodoo; uint32_t pg0220_inst; - int i, chipset; + int i; - chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20; - DRM_DEBUG("chipset (from PMC_BOOT_0): NV%02X\n", chipset); - switch (chipset) { + switch (dev_priv->chipset) { case 0x40: ctx_voodoo = nv40_ctx_voodoo; break; case 0x43: ctx_voodoo = nv43_ctx_voodoo; break; case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break; case 0x4e: ctx_voodoo = nv4e_ctx_voodoo; break; default: - DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", chipset); + DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", + dev_priv->chipset); ctx_voodoo = NULL; break; } -- cgit v1.2.3 From 5a072f32c8f941d1ef301811881e8c89c8d8a5f1 Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Sat, 3 Feb 2007 04:57:06 +0100 Subject: nouveau: rename registers to their proper names. --- shared-core/nv40_graph.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'shared-core/nv40_graph.c') diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 71434e5b..659767f2 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -664,11 +664,11 @@ nv40_graph_context_save_current(drm_device_t *dev) uint32_t instance; int i; - NV_WRITE(NV_PGRAPH_FIFO, 0); + NV_WRITE(NV04_PGRAPH_FIFO, 0); instance = NV_READ(0x40032C) & 0xFFFFF; if (!instance) { - NV_WRITE(NV_PGRAPH_FIFO, 1); + NV_WRITE(NV04_PGRAPH_FIFO, 1); return; } @@ -684,11 +684,11 @@ nv40_graph_context_save_current(drm_device_t *dev) DRM_ERROR("failed to save current grctx to ramin\n"); DRM_ERROR("instance = 0x%08x\n", NV_READ(0x40032C)); DRM_ERROR("0x40030C = 0x%08x\n", NV_READ(0x40030C)); - NV_WRITE(NV_PGRAPH_FIFO, 1); + NV_WRITE(NV04_PGRAPH_FIFO, 1); return; } - NV_WRITE(NV_PGRAPH_FIFO, 1); + NV_WRITE(NV04_PGRAPH_FIFO, 1); } /* Restore the context for a specific channel into PGRAPH @@ -705,7 +705,7 @@ nv40_graph_context_restore(drm_device_t *dev, int channel) instance = nouveau_chip_instance_get(dev, chan->ramin_grctx); - NV_WRITE(NV_PGRAPH_FIFO, 0); + NV_WRITE(NV04_PGRAPH_FIFO, 0); NV_WRITE(0x400784, instance); NV_WRITE(0x400310, NV_READ(0x400310) | 0x40); NV_WRITE(0x400304, 1); @@ -719,7 +719,7 @@ nv40_graph_context_restore(drm_device_t *dev, int channel) channel); DRM_ERROR("instance = 0x%08x\n", instance); DRM_ERROR("0x40030C = 0x%08x\n", NV_READ(0x40030C)); - NV_WRITE(NV_PGRAPH_FIFO, 1); + NV_WRITE(NV04_PGRAPH_FIFO, 1); return; } @@ -735,7 +735,7 @@ nv40_graph_context_restore(drm_device_t *dev, int channel) * recieve PGRAPH_INTR_CONTEXT_SWITCH */ NV_WRITE(NV40_PFIFO_GRCTX_INSTANCE, instance); - NV_WRITE(NV_PGRAPH_FIFO, 1); + NV_WRITE(NV04_PGRAPH_FIFO, 1); } /* Some voodoo that makes context switching work without the binary driver @@ -930,7 +930,7 @@ nv40_graph_init(drm_device_t *dev) NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM); pg0220_inst = nouveau_chip_instance_get(dev, dev_priv->fb_obj->instance); - NV_WRITE(NV_PGRAPH_NV40_UNK220, pg0220_inst); + NV_WRITE(NV40_PGRAPH_UNK220, pg0220_inst); return 0; } -- cgit v1.2.3