From 02c4e0e757b69cd6ae38b8ab2c078b3f06fea661 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <skeggsb@gmail.com>
Date: Wed, 15 Aug 2007 00:56:24 +1000
Subject: nouveau/nv40: Fix channel scheduling.

Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
---
 shared-core/nv40_fifo.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

(limited to 'shared-core/nv40_fifo.c')

diff --git a/shared-core/nv40_fifo.c b/shared-core/nv40_fifo.c
index eb160ee2..ce3f8fdd 100644
--- a/shared-core/nv40_fifo.c
+++ b/shared-core/nv40_fifo.c
@@ -193,3 +193,16 @@ nv40_fifo_save_context(struct nouveau_channel *chan)
 	return 0;
 }
 
+int
+nv40_fifo_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret;
+
+	if ((ret = nouveau_fifo_init(dev)))
+		return ret;
+
+	NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff);
+	return 0;
+}
+
-- 
cgit v1.2.3