From 5a072f32c8f941d1ef301811881e8c89c8d8a5f1 Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Sat, 3 Feb 2007 04:57:06 +0100 Subject: nouveau: rename registers to their proper names. --- shared-core/nv10_graph.c | 448 +++++++++++++++++++++++------------------------ 1 file changed, 224 insertions(+), 224 deletions(-) (limited to 'shared-core/nv10_graph.c') diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c index 7270344d..fe9a6a40 100644 --- a/shared-core/nv10_graph.c +++ b/shared-core/nv10_graph.c @@ -34,149 +34,149 @@ static void nv10_praph_pipe(drm_device_t *dev) { nouveau_wait_for_idle(dev); /* XXX check haiku comments */ - NV_WRITE(NV_PGRAPH_XFMODE0, 0x10000000); - NV_WRITE(NV_PGRAPH_XFMODE1, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x000064c0); + NV_WRITE(NV10_PGRAPH_XFMODE0, 0x10000000); + NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0); for (i = 0; i < 4; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); for (i = 0; i < 4; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00006ab0); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0); for (i = 0; i < 3; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00006a80); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80); for (i = 0; i < 3; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00000040); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000008); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000008); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00000200); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000200); for (i = 0; i < 48; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); nouveau_wait_for_idle(dev); - NV_WRITE(NV_PGRAPH_XFMODE0, 0x00000000); - NV_WRITE(NV_PGRAPH_XFMODE1, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00006400); + NV_WRITE(NV10_PGRAPH_XFMODE0, 0x00000000); + NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006400); for (i = 0; i < 211; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x40000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x40000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x40000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x40000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); - - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00006800); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006800); for (i = 0; i < 162; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x3f800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); for (i = 0; i < 25; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00006c00); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0xbf800000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00007000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006c00); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0xbf800000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca); for (i = 0; i < 35; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00007400); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007400); for (i = 0; i < 48; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00007800); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007800); for (i = 0; i < 48; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00004400); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00004400); for (i = 0; i < 32; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000000); for (i = 0; i < 16; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - NV_WRITE(NV_PGRAPH_PIPE_ADDRESS, 0x00000040); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040); for (i = 0; i < 4; i++) - NV_WRITE(NV_PGRAPH_PIPE_DATA, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); nouveau_wait_for_idle(dev); } @@ -184,18 +184,18 @@ static void nv10_praph_pipe(drm_device_t *dev) { /* TODO replace address with name use loops */ static int nv10_graph_ctx_regs [] = { -NV_PGRAPH_XY_LOGIC_MISC0, - -//NV_PGRAPH_CTX_SWITCH1, make ctx switch crash -NV_PGRAPH_CTX_SWITCH2, -NV_PGRAPH_CTX_SWITCH3, -NV_PGRAPH_CTX_SWITCH4, -NV_PGRAPH_CTX_SWITCH5, -NV_PGRAPH_CTX_CACHE1, /* 8 values from 0x400160 to 0x40017c */ -NV_PGRAPH_CTX_CACHE2, /* 8 values from 0x400180 to 0x40019c */ -NV_PGRAPH_CTX_CACHE3, /* 8 values from 0x4001a0 to 0x4001bc */ -NV_PGRAPH_CTX_CACHE4, /* 8 values from 0x4001c0 to 0x4001dc */ -NV_PGRAPH_CTX_CACHE5, /* 8 values from 0x4001e0 to 0x4001fc */ +NV03_PGRAPH_XY_LOGIC_MISC0, + +//NV10_PGRAPH_CTX_SWITCH1, make ctx switch crash +NV10_PGRAPH_CTX_SWITCH2, +NV10_PGRAPH_CTX_SWITCH3, +NV10_PGRAPH_CTX_SWITCH4, +NV10_PGRAPH_CTX_SWITCH5, +NV10_PGRAPH_CTX_CACHE1, /* 8 values from 0x400160 to 0x40017c */ +NV10_PGRAPH_CTX_CACHE2, /* 8 values from 0x400180 to 0x40019c */ +NV10_PGRAPH_CTX_CACHE3, /* 8 values from 0x4001a0 to 0x4001bc */ +NV10_PGRAPH_CTX_CACHE4, /* 8 values from 0x4001c0 to 0x4001dc */ +NV10_PGRAPH_CTX_CACHE5, /* 8 values from 0x4001e0 to 0x4001fc */ 0x00400164, 0x00400184, 0x004001a4, @@ -231,44 +231,44 @@ NV_PGRAPH_CTX_CACHE5, /* 8 values from 0x4001e0 to 0x4001fc */ 0x004001bc, 0x004001dc, 0x004001fc, -NV_PGRAPH_CTX_USER, -NV_PGRAPH_DMA_START_0, -NV_PGRAPH_DMA_START_1, -NV_PGRAPH_DMA_LENGTH, -NV_PGRAPH_DMA_MISC, -NV_PGRAPH_DMA_PITCH, -NV_PGRAPH_BOFFSET0, -NV_PGRAPH_BBASE0, -NV_PGRAPH_BLIMIT0, -NV_PGRAPH_BOFFSET1, -NV_PGRAPH_BBASE1, -NV_PGRAPH_BLIMIT1, -NV_PGRAPH_BOFFSET2, -NV_PGRAPH_BBASE2, -NV_PGRAPH_BLIMIT2, -NV_PGRAPH_BOFFSET3, -NV_PGRAPH_BBASE3, -NV_PGRAPH_BLIMIT3, -NV_PGRAPH_BOFFSET4, -NV_PGRAPH_BBASE4, -NV_PGRAPH_BLIMIT4, -NV_PGRAPH_BOFFSET5, -NV_PGRAPH_BBASE5, -NV_PGRAPH_BLIMIT5, -NV_PGRAPH_BPITCH0, -NV_PGRAPH_BPITCH1, -NV_PGRAPH_BPITCH2, -NV_PGRAPH_BPITCH3, -NV_PGRAPH_BPITCH4, -NV_PGRAPH_SURFACE, -NV_PGRAPH_STATE, -NV_PGRAPH_BSWIZZLE2, -NV_PGRAPH_BSWIZZLE5, -NV_PGRAPH_BPIXEL, -NV_PGRAPH_NOTIFY, -NV_PGRAPH_PATT_COLOR0, -NV_PGRAPH_PATT_COLOR1, -NV_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */ +NV10_PGRAPH_CTX_USER, +NV04_PGRAPH_DMA_START_0, +NV04_PGRAPH_DMA_START_1, +NV04_PGRAPH_DMA_LENGTH, +NV04_PGRAPH_DMA_MISC, +NV10_PGRAPH_DMA_PITCH, +NV04_PGRAPH_BOFFSET0, +NV04_PGRAPH_BBASE0, +NV04_PGRAPH_BLIMIT0, +NV04_PGRAPH_BOFFSET1, +NV04_PGRAPH_BBASE1, +NV04_PGRAPH_BLIMIT1, +NV04_PGRAPH_BOFFSET2, +NV04_PGRAPH_BBASE2, +NV04_PGRAPH_BLIMIT2, +NV04_PGRAPH_BOFFSET3, +NV04_PGRAPH_BBASE3, +NV04_PGRAPH_BLIMIT3, +NV04_PGRAPH_BOFFSET4, +NV04_PGRAPH_BBASE4, +NV04_PGRAPH_BLIMIT4, +NV04_PGRAPH_BOFFSET5, +NV04_PGRAPH_BBASE5, +NV04_PGRAPH_BLIMIT5, +NV04_PGRAPH_BPITCH0, +NV04_PGRAPH_BPITCH1, +NV04_PGRAPH_BPITCH2, +NV04_PGRAPH_BPITCH3, +NV04_PGRAPH_BPITCH4, +NV10_PGRAPH_SURFACE, +NV10_PGRAPH_STATE, +NV04_PGRAPH_BSWIZZLE2, +NV04_PGRAPH_BSWIZZLE5, +NV04_PGRAPH_BPIXEL, +NV10_PGRAPH_NOTIFY, +NV04_PGRAPH_PATT_COLOR0, +NV04_PGRAPH_PATT_COLOR1, +NV04_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */ 0x00400904, 0x00400908, 0x0040090c, @@ -332,14 +332,14 @@ NV_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */ 0x004009f4, 0x004009f8, 0x004009fc, -NV_PGRAPH_PATTERN, /* 2 values from 0x400808 to 0x40080c */ +NV04_PGRAPH_PATTERN, /* 2 values from 0x400808 to 0x40080c */ 0x0040080c, -NV_PGRAPH_PATTERN_SHAPE, -NV_PGRAPH_MONO_COLOR0, -NV_PGRAPH_ROP3, -NV_PGRAPH_CHROMA, -NV_PGRAPH_BETA_AND, -NV_PGRAPH_BETA_PREMULT, +NV04_PGRAPH_PATTERN_SHAPE, +NV03_PGRAPH_MONO_COLOR0, +NV04_PGRAPH_ROP3, +NV04_PGRAPH_CHROMA, +NV04_PGRAPH_BETA_AND, +NV04_PGRAPH_BETA_PREMULT, 0x00400e70, 0x00400e74, 0x00400e78, @@ -355,8 +355,8 @@ NV_PGRAPH_BETA_PREMULT, 0x00400e94, 0x00400e98, 0x00400e9c, -NV_PGRAPH_WINDOWCLIP_HORIZONTAL,/* 8 values from 0x400f00 to 0x400f1c */ -NV_PGRAPH_WINDOWCLIP_VERTICAL, /* 8 values from 0x400f20 to 0x400f3c */ +NV10_PGRAPH_WINDOWCLIP_HORIZONTAL, /* 8 values from 0x400f00 to 0x400f1c */ +NV10_PGRAPH_WINDOWCLIP_VERTICAL, /* 8 values from 0x400f20 to 0x400f3c */ 0x00400f04, 0x00400f24, 0x00400f08, @@ -371,14 +371,14 @@ NV_PGRAPH_WINDOWCLIP_VERTICAL, /* 8 values from 0x400f20 to 0x400f3c */ 0x00400f38, 0x00400f1c, 0x00400f3c, -NV_PGRAPH_XFMODE0, -NV_PGRAPH_XFMODE1, -NV_PGRAPH_GLOBALSTATE0, -NV_PGRAPH_GLOBALSTATE1, -NV_PGRAPH_STORED_FMT, -NV_PGRAPH_SOURCE_COLOR, -NV_PGRAPH_ABS_X_RAM, /* 32 values from 0x400400 to 0x40047c */ -NV_PGRAPH_ABS_Y_RAM, /* 32 values from 0x400480 to 0x4004fc */ +NV10_PGRAPH_XFMODE0, +NV10_PGRAPH_XFMODE1, +NV10_PGRAPH_GLOBALSTATE0, +NV10_PGRAPH_GLOBALSTATE1, +NV04_PGRAPH_STORED_FMT, +NV04_PGRAPH_SOURCE_COLOR, +NV03_PGRAPH_ABS_X_RAM, /* 32 values from 0x400400 to 0x40047c */ +NV03_PGRAPH_ABS_Y_RAM, /* 32 values from 0x400480 to 0x4004fc */ 0x00400404, 0x00400484, 0x00400408, @@ -441,27 +441,27 @@ NV_PGRAPH_ABS_Y_RAM, /* 32 values from 0x400480 to 0x4004fc */ 0x004004f8, 0x0040047c, 0x004004fc, -NV_PGRAPH_ABS_UCLIP_XMIN, -NV_PGRAPH_ABS_UCLIP_XMAX, -NV_PGRAPH_ABS_UCLIP_YMIN, -NV_PGRAPH_ABS_UCLIP_YMAX, +NV03_PGRAPH_ABS_UCLIP_XMIN, +NV03_PGRAPH_ABS_UCLIP_XMAX, +NV03_PGRAPH_ABS_UCLIP_YMIN, +NV03_PGRAPH_ABS_UCLIP_YMAX, 0x00400550, 0x00400558, 0x00400554, 0x0040055c, -NV_PGRAPH_ABS_UCLIPA_XMIN, -NV_PGRAPH_ABS_UCLIPA_XMAX, -NV_PGRAPH_ABS_UCLIPA_YMIN, -NV_PGRAPH_ABS_UCLIPA_YMAX, -NV_PGRAPH_ABS_ICLIP_XMAX, -NV_PGRAPH_ABS_ICLIP_YMAX, -NV_PGRAPH_XY_LOGIC_MISC1, -NV_PGRAPH_XY_LOGIC_MISC2, -NV_PGRAPH_XY_LOGIC_MISC3, -NV_PGRAPH_CLIPX_0, -NV_PGRAPH_CLIPX_1, -NV_PGRAPH_CLIPY_0, -NV_PGRAPH_CLIPY_1, +NV03_PGRAPH_ABS_UCLIPA_XMIN, +NV03_PGRAPH_ABS_UCLIPA_XMAX, +NV03_PGRAPH_ABS_UCLIPA_YMIN, +NV03_PGRAPH_ABS_UCLIPA_YMAX, +NV03_PGRAPH_ABS_ICLIP_XMAX, +NV03_PGRAPH_ABS_ICLIP_YMAX, +NV03_PGRAPH_XY_LOGIC_MISC1, +NV03_PGRAPH_XY_LOGIC_MISC2, +NV03_PGRAPH_XY_LOGIC_MISC3, +NV03_PGRAPH_CLIPX_0, +NV03_PGRAPH_CLIPX_1, +NV03_PGRAPH_CLIPY_0, +NV03_PGRAPH_CLIPY_1, 0x00400e40, 0x00400e44, 0x00400e48, @@ -490,24 +490,24 @@ NV_PGRAPH_CLIPY_1, 0x00400e34, 0x00400e38, 0x00400e3c, -NV_PGRAPH_PASSTHRU_0, -NV_PGRAPH_PASSTHRU_1, -NV_PGRAPH_PASSTHRU_2, -NV_PGRAPH_DIMX_TEXTURE, -NV_PGRAPH_WDIMX_TEXTURE, -NV_PGRAPH_DVD_COLORFMT, -NV_PGRAPH_SCALED_FORMAT, -NV_PGRAPH_MISC24_0, -NV_PGRAPH_MISC24_1, -NV_PGRAPH_MISC24_2, -NV_PGRAPH_X_MISC, -NV_PGRAPH_Y_MISC, -NV_PGRAPH_VALID1, -NV_PGRAPH_VALID2, +NV04_PGRAPH_PASSTHRU_0, +NV04_PGRAPH_PASSTHRU_1, +NV04_PGRAPH_PASSTHRU_2, +NV10_PGRAPH_DIMX_TEXTURE, +NV10_PGRAPH_WDIMX_TEXTURE, +NV10_PGRAPH_DVD_COLORFMT, +NV10_PGRAPH_SCALED_FORMAT, +NV04_PGRAPH_MISC24_0, +NV04_PGRAPH_MISC24_1, +NV04_PGRAPH_MISC24_2, +NV03_PGRAPH_X_MISC, +NV03_PGRAPH_Y_MISC, +NV04_PGRAPH_VALID1, +NV04_PGRAPH_VALID2, }; static int nv17_graph_ctx_regs [] = { -NV_PGRAPH_DEBUG_4, +NV10_PGRAPH_DEBUG_4, 0x004006b0, 0x00400eac, 0x00400eb0, @@ -532,12 +532,12 @@ void nouveau_nv10_context_switch(drm_device_t *dev) drm_nouveau_private_t *dev_priv = dev->dev_private; int channel, channel_old, i, j; - channel=NV_READ(NV_PFIFO_CACH1_PSH1)&(nouveau_fifo_number(dev)-1); - channel_old = (NV_READ(NV_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); + channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); + channel_old = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",channel_old, channel); - NV_WRITE(NV_PGRAPH_FIFO,0x0); + NV_WRITE(NV04_PGRAPH_FIFO,0x0); #if 0 NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000000); NV_WRITE(NV_PFIFO_CACH1_PUL1, 0x00000000); @@ -554,8 +554,8 @@ void nouveau_nv10_context_switch(drm_device_t *dev) nouveau_wait_for_idle(dev); - NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10000000); - NV_WRITE(NV_PGRAPH_CTX_USER, (NV_READ(NV_PGRAPH_CTX_USER) & 0xffffff) | (0x1f << 24)); + NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10000000); + NV_WRITE(NV10_PGRAPH_CTX_USER, (NV_READ(NV10_PGRAPH_CTX_USER) & 0xffffff) | (0x1f << 24)); nouveau_wait_for_idle(dev); // restore PGRAPH context @@ -570,16 +570,16 @@ void nouveau_nv10_context_switch(drm_device_t *dev) nouveau_wait_for_idle(dev); #endif - NV_WRITE(NV_PGRAPH_CTX_CONTROL, 0x10010100); - NV_WRITE(NV_PGRAPH_CTX_USER, channel << 24); - NV_WRITE(NV_PGRAPH_FFINTFC_ST2, NV_READ(NV_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF); + NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_USER, channel << 24); + NV_WRITE(NV10_PGRAPH_FFINTFC_ST2, NV_READ(NV10_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF); #if 0 NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000001); NV_WRITE(NV_PFIFO_CACH1_PUL1, 0x00000001); NV_WRITE(NV_PFIFO_CACHES, 0x00000001); #endif - NV_WRITE(NV_PGRAPH_FIFO,0x1); + NV_WRITE(NV04_PGRAPH_FIFO,0x1); } int nv10_graph_context_create(drm_device_t *dev, int channel) { @@ -592,7 +592,7 @@ int nv10_graph_context_create(drm_device_t *dev, int channel) { dev_priv->fifos[channel].nv10_pgraph_ctx[0] = 0x0001ffff; /* is it really needed ??? */ if (dev_priv->chipset>=0x17) { - dev_priv->fifos[channel].nv10_pgraph_ctx[sizeof(nv10_graph_ctx_regs) + 0] = NV_READ(NV_PGRAPH_DEBUG_4); + dev_priv->fifos[channel].nv10_pgraph_ctx[sizeof(nv10_graph_ctx_regs) + 0] = NV_READ(NV10_PGRAPH_DEBUG_4); dev_priv->fifos[channel].nv10_pgraph_ctx[sizeof(nv10_graph_ctx_regs) + 1] = NV_READ(0x004006b0); } -- cgit v1.2.3