From f48a7685bd7a241001cec89acd8cce6cdefa941e Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Tue, 28 Nov 2006 21:32:03 +0100 Subject: For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context. When cleaning a fifo, we shouldn't assume everybody use nv40 ;) Fill DMA_SUBROUTINE fill correct value. --- shared-core/nouveau_reg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index fe42f986..e56630f0 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -164,6 +164,7 @@ #define NV_PFIFO_CACH1_DMAP 0x00003240 #define NV_PFIFO_CACH1_DMAG 0x00003244 #define NV_PFIFO_CACH1_REF_CNT 0x00003248 +#define NV_PFIFO_CACH1_DMASR 0x0000324C #define NV_PFIFO_CACH1_PUL0 0x00003250 #define NV_PFIFO_CACH1_PUL1 0x00003254 #define NV_PFIFO_CACH1_HASH 0x00003258 -- cgit v1.2.3