From f2e64d527699751d6b64698495ae1d48eeee6cf7 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 24 Jun 2007 18:56:01 +1000 Subject: nouveau: NV4X PFIFO engtab functions --- shared-core/nouveau_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index ea4a2f6b..07c54a92 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -462,6 +462,6 @@ #define NV40_RAMFC_UNK_40 0x40 #define NV40_RAMFC_UNK_44 0x44 #define NV40_RAMFC_UNK_48 0x48 -#define NV40_RAMFC_2088 0x4C -#define NV40_RAMFC_3300 0x50 +#define NV40_RAMFC_UNK_4C 0x4C +#define NV40_RAMFC_UNK_50 0x50 -- cgit v1.2.3 From 05d86d950a10b77ffaa708e9d89b2a87c11fed01 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 24 Jun 2007 18:57:09 +1000 Subject: nouveau: NV04 PFIFO engtab functions --- shared-core/nouveau_reg.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 07c54a92..ba61f997 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -404,7 +404,7 @@ #define NV10_PFIFO_CACHE1_SEMAPHORE 0x0000326C #define NV03_PFIFO_CACHE1_GET 0x00003270 #define NV04_PFIFO_CACHE1_ENGINE 0x00003280 -#define NV10_PFIFO_CACHE1_DMA_DCOUNT 0x000032A0 +#define NV04_PFIFO_CACHE1_DMA_DCOUNT 0x000032A0 #define NV40_PFIFO_GRCTX_INSTANCE 0x000032E0 #define NV40_PFIFO_UNK32E4 0x000032E4 #define NV04_PFIFO_CACHE1_METHOD(i) (0x00003800+(i*8)) @@ -427,7 +427,10 @@ #define NV04_RAMFC_DMA_PUT 0x00 #define NV04_RAMFC_DMA_GET 0x04 #define NV04_RAMFC_DMA_INSTANCE 0x08 +#define NV04_RAMFC_DMA_STATE 0x0C #define NV04_RAMFC_DMA_FETCH 0x10 +#define NV04_RAMFC_ENGINE 0x14 +#define NV04_RAMFC_PULL1_ENGINE 0x18 #define NV10_RAMFC_DMA_PUT 0x00 #define NV10_RAMFC_DMA_GET 0x04 -- cgit v1.2.3 From 38617b6a26d893bbd7b235019159e609f6cdd84b Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 25 Jun 2007 03:52:06 +1000 Subject: nouveau: name some regs --- shared-core/nouveau_reg.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index ba61f997..4c013c53 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -135,6 +135,17 @@ #define NV10_PGRAPH_CTX_CACHE4 0x004001C0 #define NV04_PGRAPH_CTX_CACHE4 0x004001E0 #define NV10_PGRAPH_CTX_CACHE5 0x004001E0 +#define NV40_PGRAPH_CTXCTL_0304 0x00400304 +#define NV40_PGRAPH_CTXCTL_0304_XFER_CTX 0x00000001 +#define NV40_PGRAPH_CTXCTL_0310 0x00400310 +#define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE 0x00000020 +#define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD 0x00000040 +#define NV40_PGRAPH_CTXCTL_030C 0x0040030c +#define NV40_PGRAPH_CTXCTL_UCODE_INDEX 0x00400324 +#define NV40_PGRAPH_CTXCTL_UCODE_DATA 0x00400328 +#define NV40_PGRAPH_CTXCTL_CUR 0x0040032c +#define NV40_PGRAPH_CTXCTL_CUR_LOADED 0x01000000 +#define NV40_PGRAPH_CTXCTL_CUR_INST_MASK 0x000FFFFF #define NV03_PGRAPH_ABS_X_RAM 0x00400400 #define NV03_PGRAPH_ABS_Y_RAM 0x00400480 #define NV03_PGRAPH_X_MISC 0x00400500 @@ -230,7 +241,11 @@ #define NV10_PGRAPH_SCALED_FORMAT 0x00400778 #define NV10_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 #define NV10_PGRAPH_CHANNEL_CTX_SIZE 0x00400784 +#define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784 #define NV10_PGRAPH_CHANNEL_CTX_POINTER 0x00400788 +#define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788 +#define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001 +#define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002 #define NV04_PGRAPH_PATT_COLOR0 0x00400800 #define NV04_PGRAPH_PATT_COLOR1 0x00400804 #define NV04_PGRAPH_PATTERN 0x00400808 -- cgit v1.2.3 From c806bba4665bb369168ee0b453fa28e2e0bf2a5d Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 5 Jul 2007 00:12:33 +1000 Subject: nouveau/nv50: Initial channel/object support Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. --- shared-core/nouveau_reg.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 4c013c53..c2ebc714 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -47,11 +47,15 @@ #define NV_CLASS_DMA_IN_MEMORY 0x0000003D #define NV03_FIFO_SIZE 0x8000UL -#define NV_MAX_FIFO_NUMBER 32 +#define NV_MAX_FIFO_NUMBER 128 #define NV03_FIFO_REGS_SIZE 0x10000 #define NV03_FIFO_REGS(i) (0x00800000+i*NV03_FIFO_REGS_SIZE) # define NV03_FIFO_REGS_DMAPUT(i) (NV03_FIFO_REGS(i)+0x40) # define NV03_FIFO_REGS_DMAGET(i) (NV03_FIFO_REGS(i)+0x44) +#define NV50_FIFO_REGS_SIZE 0x2000 +#define NV50_FIFO_REGS(i) (0x00c00000+i*NV50_FIFO_REGS_SIZE) +# define NV50_FIFO_REGS_DMAPUT(i) (NV50_FIFO_REGS(i)+0x40) +# define NV50_FIFO_REGS_DMAGET(i) (NV50_FIFO_REGS(i)+0x44) #define NV03_PMC_BOOT_0 0x00000000 #define NV03_PMC_INTR_0 0x00000100 @@ -332,6 +336,12 @@ #define NV04_PFIFO_MODE 0x00002504 #define NV04_PFIFO_DMA 0x00002508 #define NV04_PFIFO_SIZE 0x0000250c +#define NV50_PFIFO_CTX_TABLE(c) (0x2600+(c)*4) +#define NV50_PFIFO_CTX_TABLE__SIZE 128 +#define NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED (1<<31) +#define NV50_PFIFO_CTX_TABLE_UNK30_BAD (1<<30) +#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80 0x0FFFFFFF +#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84 0x00FFFFFF #define NV03_PFIFO_CACHE0_PUSH0 0x00003000 #define NV03_PFIFO_CACHE0_PULL0 0x00003040 #define NV04_PFIFO_CACHE0_PULL0 0x00003050 -- cgit v1.2.3 From 694e1c5c3f768436651ddf95e11ab5a89ccc8ffa Mon Sep 17 00:00:00 2001 From: Arthur Huillet Date: Wed, 11 Jul 2007 02:35:10 +0200 Subject: Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. --- shared-core/nouveau_reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index c2ebc714..a66d2d34 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -39,6 +39,8 @@ #define NV_DMA_TARGET_VIDMEM 0 #define NV_DMA_TARGET_PCI 2 #define NV_DMA_TARGET_AGP 3 +/*The following is not a real value used by nvidia cards, it's changed by nouveau_object_dma_create*/ +#define NV_DMA_TARGET_PCI_NONLINEAR 8 /* Some object classes we care about in the drm */ #define NV_CLASS_DMA_FROM_MEMORY 0x00000002 -- cgit v1.2.3 From 14ecf8d6c2ccecbe9841ad4a7eb3b301685f2351 Mon Sep 17 00:00:00 2001 From: Pekka Paalanen Date: Fri, 6 Jul 2007 12:47:53 +0300 Subject: nouveau: Replace 0x00400104 and 0x00400108 with names. NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. The prefix NV03 is chosen because nv10reg.h had no versioned prefix, and the code using these registers does not check card_type. --- shared-core/nouveau_reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index a66d2d34..bcdb1a9f 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -110,6 +110,8 @@ #define NV04_PGRAPH_DEBUG_3 0x0040008c #define NV10_PGRAPH_DEBUG_4 0x00400090 #define NV03_PGRAPH_INTR 0x00400100 +#define NV03_PGRAPH_NSTATUS 0x00400104 +#define NV03_PGRAPH_NSOURCE 0x00400108 #define NV03_PGRAPH_INTR_EN 0x00400140 #define NV40_PGRAPH_INTR_EN 0x0040013C # define NV_PGRAPH_INTR_NOTIFY (1<< 0) -- cgit v1.2.3 From 0c77f5abeadcbb89643740889cc865ba0ae66538 Mon Sep 17 00:00:00 2001 From: Pekka Paalanen Date: Fri, 6 Jul 2007 13:57:31 +0300 Subject: nouveau: Add bitfield names for NSOURCE and NSTATUS. Name strings and pretty-printing in nouveau_graph_dump_trap_info(). --- shared-core/nouveau_reg.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index bcdb1a9f..47d54b2a 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -111,7 +111,30 @@ #define NV10_PGRAPH_DEBUG_4 0x00400090 #define NV03_PGRAPH_INTR 0x00400100 #define NV03_PGRAPH_NSTATUS 0x00400104 +# define NV03_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) +# define NV03_PGRAPH_NSTATUS_INVALID_STATE (1<<24) +# define NV03_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) +# define NV03_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) #define NV03_PGRAPH_NSOURCE 0x00400108 +# define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<< 0) +# define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<< 1) +# define NV03_PGRAPH_NSOURCE_PROTECTION_ERROR (1<< 2) +# define NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION (1<< 3) +# define NV03_PGRAPH_NSOURCE_LIMIT_COLOR (1<< 4) +# define NV03_PGRAPH_NSOURCE_LIMIT_ZETA (1<< 5) +# define NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD (1<< 6) +# define NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION (1<< 7) +# define NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION (1<< 8) +# define NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION (1<< 9) +# define NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION (1<<10) +# define NV03_PGRAPH_NSOURCE_STATE_INVALID (1<<11) +# define NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY (1<<12) +# define NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE (1<<13) +# define NV03_PGRAPH_NSOURCE_METHOD_CNT (1<<14) +# define NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION (1<<15) +# define NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION (1<<16) +# define NV03_PGRAPH_NSOURCE_DMA_WIDTH_A (1<<17) +# define NV03_PGRAPH_NSOURCE_DMA_WIDTH_B (1<<18) #define NV03_PGRAPH_INTR_EN 0x00400140 #define NV40_PGRAPH_INTR_EN 0x0040013C # define NV_PGRAPH_INTR_NOTIFY (1<< 0) -- cgit v1.2.3 From a46104674f129e873b8dfa29cf8aac9c67bd77be Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 10 Aug 2007 13:54:26 +1000 Subject: nouveau/nv50: demagic instmem setup. --- shared-core/nouveau_reg.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 47d54b2a..65614627 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -80,6 +80,16 @@ #define NV40_PMC_1708 0x00001708 #define NV40_PMC_170C 0x0000170C +/* probably PMC ? */ +#define NV50_PUNK_BAR0_PRAMIN 0x00001700 +#define NV50_PUNK_BAR_CFG_BASE 0x00001704 +#define NV50_PUNK_BAR_CFG_BASE_VALID (1<<30) +#define NV50_PUNK_BAR1_CTXDMA 0x00001708 +#define NV50_PUNK_BAR1_CTXDMA_VALID (1<<31) +#define NV50_PUNK_BAR3_CTXDMA 0x0000170C +#define NV50_PUNK_BAR3_CTXDMA_VALID (1<<31) +#define NV50_PUNK_UNK1710 0x00001710 + #define NV04_PTIMER_INTR_0 0x00009100 #define NV04_PTIMER_INTR_EN_0 0x00009140 #define NV04_PTIMER_NUMERATOR 0x00009200 -- cgit v1.2.3 From a654c0341a7892307522ed6e7f4518cc7e28a99e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 22 Aug 2007 13:17:19 +1000 Subject: nouveau/nv40: Dump extra info on ucode state if ctx switch fails. --- shared-core/nouveau_reg.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 65614627..1023e75e 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -178,6 +178,10 @@ #define NV10_PGRAPH_CTX_CACHE5 0x004001E0 #define NV40_PGRAPH_CTXCTL_0304 0x00400304 #define NV40_PGRAPH_CTXCTL_0304_XFER_CTX 0x00000001 +#define NV40_PGRAPH_CTXCTL_UCODE_STAT 0x00400308 +#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_MASK 0xff000000 +#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT 24 +#define NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK 0x00ffffff #define NV40_PGRAPH_CTXCTL_0310 0x00400310 #define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE 0x00000020 #define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD 0x00000040 -- cgit v1.2.3 From a331d2e352675be260254e8abef412540ead9c30 Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Sun, 26 Aug 2007 20:48:32 +0200 Subject: nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition - fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+ --- shared-core/nouveau_reg.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 1023e75e..a1895c34 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -15,9 +15,6 @@ # define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK 0xfff00000 # define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT 20 -#define NV03_PGRAPH_STATUS 0x004006b0 -#define NV04_PGRAPH_STATUS 0x00400700 - #define NV_RAMIN 0x00700000 #define NV_RAMHT_HANDLE_OFFSET 0 @@ -264,7 +261,12 @@ #define NV04_PGRAPH_BLIMIT5 0x00400698 #define NV04_PGRAPH_BSWIZZLE2 0x0040069C #define NV04_PGRAPH_BSWIZZLE5 0x004006A0 +#define NV03_PGRAPH_STATUS 0x004006B0 +#define NV04_PGRAPH_STATUS 0x00400700 +#define NV04_PGRAPH_TRAPPED_ADDR 0x00400704 +#define NV04_PGRAPH_TRAPPED_DATA 0x00400708 #define NV04_PGRAPH_SURFACE 0x0040070C +#define NV10_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C #define NV04_PGRAPH_STATE 0x00400710 #define NV10_PGRAPH_SURFACE 0x00400710 #define NV04_PGRAPH_NOTIFY 0x00400714 -- cgit v1.2.3 From 0bd8752a0cb8afb7f29a5f659c3459aab42d9955 Mon Sep 17 00:00:00 2001 From: Patrice Mandin Date: Mon, 10 Sep 2007 18:52:17 +0200 Subject: nouveau: nv10: add combiner registers --- shared-core/nouveau_reg.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index a1895c34..21133d98 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -319,6 +319,18 @@ #define NV47_PGRAPH_TSTATUS0(i) 0x00400D0C #define NV04_PGRAPH_V_RAM 0x00400D40 #define NV04_PGRAPH_W_RAM 0x00400D80 +#define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40 +#define NV10_PGRAPH_COMBINER1_IN_ALPHA 0x00400E44 +#define NV10_PGRAPH_COMBINER0_IN_RGB 0x00400E48 +#define NV10_PGRAPH_COMBINER1_IN_RGB 0x00400E4C +#define NV10_PGRAPH_COMBINER_COLOR0 0x00400E50 +#define NV10_PGRAPH_COMBINER_COLOR1 0x00400E54 +#define NV10_PGRAPH_COMBINER0_OUT_ALPHA 0x00400E58 +#define NV10_PGRAPH_COMBINER1_OUT_ALPHA 0x00400E5C +#define NV10_PGRAPH_COMBINER0_OUT_RGB 0x00400E60 +#define NV10_PGRAPH_COMBINER1_OUT_RGB 0x00400E64 +#define NV10_PGRAPH_COMBINER_FINAL0 0x00400E68 +#define NV10_PGRAPH_COMBINER_FINAL1 0x00400E6C #define NV10_PGRAPH_WINDOWCLIP_HORIZONTAL 0x00400F00 #define NV10_PGRAPH_WINDOWCLIP_VERTICAL 0x00400F20 #define NV10_PGRAPH_XFMODE0 0x00400F40 -- cgit v1.2.3 From 9cd6ece3079373eddff320a1d3e09bfe2a35be83 Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Sun, 30 Sep 2007 23:09:30 +0200 Subject: nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle Also clean PGRAPH_CHANNEL macros --- shared-core/nouveau_reg.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 21133d98..59b69547 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -286,10 +286,8 @@ #define NV10_PGRAPH_DMA_PITCH 0x00400770 #define NV10_PGRAPH_DVD_COLORFMT 0x00400774 #define NV10_PGRAPH_SCALED_FORMAT 0x00400778 -#define NV10_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 -#define NV10_PGRAPH_CHANNEL_CTX_SIZE 0x00400784 +#define NV20_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 #define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784 -#define NV10_PGRAPH_CHANNEL_CTX_POINTER 0x00400788 #define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788 #define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001 #define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002 -- cgit v1.2.3 From 9b294bbe0ec79177298ea32746fbed03fcf62055 Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Wed, 10 Oct 2007 01:12:20 +0200 Subject: nouveau: try to fix big endian. --- shared-core/nouveau_reg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 59b69547..76f5950d 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -57,6 +57,7 @@ # define NV50_FIFO_REGS_DMAGET(i) (NV50_FIFO_REGS(i)+0x44) #define NV03_PMC_BOOT_0 0x00000000 +#define NV03_PMC_BOOT_1 0x00000004 #define NV03_PMC_INTR_0 0x00000100 # define NV_PMC_INTR_0_PFIFO_PENDING (1<< 8) # define NV_PMC_INTR_0_PGRAPH_PENDING (1<<12) -- cgit v1.2.3 From bf126f4925bf1601935e085be2feeb004b474a05 Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Wed, 10 Oct 2007 21:11:43 +0200 Subject: nouveau : nv10 and nv04 PGRAPH_NSTATUS are different --- shared-core/nouveau_reg.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'shared-core/nouveau_reg.h') diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 76f5950d..4dc3b7fa 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -119,10 +119,14 @@ #define NV10_PGRAPH_DEBUG_4 0x00400090 #define NV03_PGRAPH_INTR 0x00400100 #define NV03_PGRAPH_NSTATUS 0x00400104 -# define NV03_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) -# define NV03_PGRAPH_NSTATUS_INVALID_STATE (1<<24) -# define NV03_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) -# define NV03_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) +# define NV04_PGRAPH_NSTATUS_STATE_IN_USE (1<<11) +# define NV04_PGRAPH_NSTATUS_INVALID_STATE (1<<12) +# define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<13) +# define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<14) +# define NV10_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) +# define NV10_PGRAPH_NSTATUS_INVALID_STATE (1<<24) +# define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) +# define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) #define NV03_PGRAPH_NSOURCE 0x00400108 # define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<< 0) # define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<< 1) -- cgit v1.2.3