From f0e399d8f0c3c006687e0fc8e68268087607d5f5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Mon, 18 Nov 2013 11:40:08 +0100 Subject: radeon: don't overallocate stencil by 4 on SI and CIK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marek Olšák Reviewed-and-Tested-by: Michel Dänzer --- radeon/radeon_surface.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'radeon/radeon_surface.c') diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index ea7c0900..555db8d9 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -1436,16 +1436,17 @@ static void si_surf_minify(struct radeon_surface *surf, */ if (level == 0 && surf->last_level == 0) /* Non-mipmap pitch padded to slice alignment */ + /* Using just bpe here breaks stencil blitting; surf->bpe works. */ xalign = MAX2(xalign, slice_align / surf->bpe); else if (surflevel->mode == RADEON_SURF_MODE_LINEAR_ALIGNED) /* Small rows evenly distributed across slice */ - xalign = MAX2(xalign, slice_align / surf->bpe / surflevel->nblk_y); + xalign = MAX2(xalign, slice_align / bpe / surflevel->nblk_y); surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); surflevel->nblk_z = ALIGN(surflevel->nblk_z, zalign); surflevel->offset = offset; - surflevel->pitch_bytes = surflevel->nblk_x * surf->bpe * surf->nsamples; + surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; surflevel->slice_size = ALIGN(surflevel->pitch_bytes * surflevel->nblk_y, slice_align); surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size; -- cgit v1.2.3