From dd1f33f83cbbb9917e13f194fadda4f7066ea98a Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 14 May 2008 22:35:32 +1000 Subject: ati_pcigart: fill out 40-bit gart table support properly Thanks to Alex for supplying this info. --- linux-core/ati_pcigart.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'linux-core') diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index beaa4424..34081d4f 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -34,6 +34,8 @@ #include "drmP.h" # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ +# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1)) + static int drm_ati_alloc_pcigart_table(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) { @@ -148,18 +150,23 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga bus_address = 0; goto done; } - page_base = (u32) entry->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { switch(gart_info->gart_reg_if) { case DRM_ATI_GART_IGP: + page_base = (u32) entry->busaddr[i] & ATI_PCIGART_PAGE_MASK; + page_base |= (upper_32_bits(entry->busaddr[i]) & 0xff) << 4; *pci_gart = cpu_to_le32((page_base) | 0xc); break; case DRM_ATI_GART_PCIE: + page_base = (u32)(entry->busaddr[i] & ATI_PCIGART_PAGE_MASK); + page_base >>= 8; + page_base |= (upper_32_bits(entry->busaddr[i]) & 0xff) << 24; *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); break; default: case DRM_ATI_GART_PCI: + page_base = (u32) entry->busaddr[i]; *pci_gart = cpu_to_le32(page_base); break; } -- cgit v1.2.3