From af326f6f0c26191b4aef2183fb485e58495b29a5 Mon Sep 17 00:00:00 2001
From: Felix Kuehling <fxkuehl@gmx.de>
Date: Wed, 22 Sep 2004 22:51:18 +0000
Subject: Create permanent maps of framebuffer, aperture and MMIO registers.
 Added     chipset-type information in driver data field of Savage PCI-IDs.
 Added     missing PCI-ID 0x8d03 (ProSavageDDR on Pentium boards). Don't
 require     AGP.

---
 linux-core/savage_dma.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++-
 linux-core/savage_drv.h | 45 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 94 insertions(+), 1 deletion(-)

(limited to 'linux-core')

diff --git a/linux-core/savage_dma.c b/linux-core/savage_dma.c
index b012e1ba..581d4302 100644
--- a/linux-core/savage_dma.c
+++ b/linux-core/savage_dma.c
@@ -26,6 +26,7 @@
 /*=========================================================*/
 #include "savage.h"
 #include "drmP.h"
+#include "savage_drm.h"
 #include "savage_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
@@ -34,7 +35,54 @@
 #define SAVAGE_DEFAULT_USEC_TIMEOUT	10000
 #define SAVAGE_FREELIST_DEBUG		0
 
+static int savage_preinit( drm_device_t *dev, unsigned long chipset )
+{
+	drm_savage_private_t *dev_priv;
+	unsigned mmioBase, fbBase, fbSize, apertureBase;
+	int ret = 0;
+
+	dev_priv = DRM(alloc)( sizeof(drm_savage_private_t), DRM_MEM_DRIVER );
+	if ( dev_priv == NULL )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv, 0, sizeof(drm_savage_private_t) );
+	dev->dev_private = (void *)dev_priv;
+	dev_priv->chipset = (enum savage_family)chipset;
+
+	if( S3_SAVAGE3D_SERIES(dev_priv->chipset) ) {
+		fbBase = pci_resource_start( dev->pdev, 0 );
+		fbSize = SAVAGE_FB_SIZE_S3;
+		mmioBase = fbBase + fbSize;
+		apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
+	} else if( chipset != S3_SUPERSAVAGE ) {
+		mmioBase = pci_resource_start( dev->pdev, 0 );
+		fbBase = pci_resource_start( dev->pdev, 1 );
+		fbSize = SAVAGE_FB_SIZE_S4;
+		apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
+	} else {
+		mmioBase = pci_resource_start( dev->pdev, 0 );
+		fbBase = pci_resource_start( dev->pdev, 1 );
+		fbSize = pci_resource_len( dev->pdev, 1 );
+		apertureBase = pci_resource_start( dev->pdev, 2 );
+	}
+
+	if( (ret = DRM(initmap)( dev, mmioBase, SAVAGE_MMIO_SIZE,
+				 _DRM_REGISTERS, 0 )))
+		return ret;
+
+	if( (ret = DRM(initmap)( dev, fbBase, fbSize,
+				 _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
+		return ret;
+
+	if( (ret = DRM(initmap)( dev, apertureBase, SAVAGE_APERTURE_SIZE,
+				 _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
+		return ret;
+
+	return ret;
+}
+
 void DRM(driver_register_fns)(drm_device_t *dev)
 {
-	dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR;
+	dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR;
+	dev->fn_tbl.preinit = savage_preinit;
 }
diff --git a/linux-core/savage_drv.h b/linux-core/savage_drv.h
index 4cb59fea..755ed2e9 100644
--- a/linux-core/savage_drv.h
+++ b/linux-core/savage_drv.h
@@ -24,4 +24,49 @@
 #ifndef __SAVAGE_DRV_H__
 #define __SAVAGE_DRV_H__
 
+/* these chip tags should match the ones in the 2D driver in savage_regs.h. */
+enum savage_family {
+    S3_UNKNOWN = 0,
+    S3_SAVAGE3D,
+    S3_SAVAGE_MX,
+    S3_SAVAGE4,
+    S3_PROSAVAGE,
+    S3_TWISTER,
+    S3_PROSAVAGEDDR,
+    S3_SUPERSAVAGE,
+    S3_SAVAGE2000,
+    S3_LAST
+};
+
+#define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
+
+#define S3_SAVAGE4_SERIES(chip)  ((chip==S3_SAVAGE4)            \
+                                  || (chip==S3_PROSAVAGE)       \
+                                  || (chip==S3_TWISTER)         \
+                                  || (chip==S3_PROSAVAGEDDR))
+
+#define	S3_SAVAGE_MOBILE_SERIES(chip)	((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
+
+#define S3_SAVAGE_SERIES(chip)    ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
+
+#define S3_MOBILE_TWISTER_SERIES(chip)   ((chip==S3_TWISTER)    \
+                                          ||(chip==S3_PROSAVAGEDDR))
+
+/* flags */
+#define SAVAGE_IS_AGP 1
+
+typedef struct drm_savage_private {
+	drm_savage_sarea_t *sarea_priv;
+
+	enum savage_family chipset;
+	unsigned flags;
+	
+} drm_savage_private_t;
+
+#define SAVAGE_FB_SIZE_S3	0x01000000  /*  16MB */
+#define SAVAGE_FB_SIZE_S4	0x02000000  /*  32MB */
+#define SAVAGE_MMIO_SIZE        0x00080000  /* 512kB */
+#define SAVAGE_APERTURE_OFFSET  0x02000000  /*  32MB */
+#define SAVAGE_APERTURE_SIZE    0x05000000  /* 5 tiled surfaces, 16MB each */
+
 #endif /* end #ifndef __SAVAGE_DRV_ */
-- 
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