From 2489062a3319c72197914ee06b089ae581c5f0a8 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 31 Oct 2007 11:27:44 +1100 Subject: i915: add backwards compat chipset flushing code --- linux-core/i915_compat.c | 141 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 141 insertions(+) create mode 100644 linux-core/i915_compat.c (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c new file mode 100644 index 00000000..86eb1e1c --- /dev/null +++ b/linux-core/i915_compat.c @@ -0,0 +1,141 @@ +#include "drmP.h" + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) + +#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970 +#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980 +#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990 +#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0 +#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00 +#define PCI_DEVICE_ID_INTEL_82965GME_HB 0x2A10 +#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC +#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0 +#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0 +#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0 + +#define IS_I965 (agp_dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB) + +#define IS_G33 (agp_dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \ + agp_dev->device == PCI_DEVICE_ID_INTEL_Q33_HB) + +#define I915_IFPADDR 0x60 +#define I965_IFPADDR 0x70 + +static struct _intel_private_compat { + void __iomem *flush_page; + struct resource ifp_resource; +} intel_private; + +static void +intel_compat_align_resource(void *data, struct resource *res, + resource_size_t size, resource_size_t align) +{ + return; +} + + +static int intel_alloc_chipset_flush_resource(struct pci_dev *pdev) +{ + int ret; + ret = pci_bus_alloc_resource(pdev->bus, &intel_private.ifp_resource, PAGE_SIZE, + PAGE_SIZE, PCIBIOS_MIN_MEM, 0, + intel_compat_align_resource, pdev); + if (ret != 0) + return ret; + + return 0; +} + +static void intel_i915_setup_chipset_flush(struct pci_dev *pdev) +{ + int ret; + u32 temp; + + pci_read_config_dword(pdev, I915_IFPADDR, &temp); + if (!(temp & 0x1)) { + intel_alloc_chipset_flush_resource(pdev); + + pci_write_config_dword(pdev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); + } else { + temp &= ~1; + + intel_private.ifp_resource.start = temp; + intel_private.ifp_resource.end = temp + PAGE_SIZE; + ret = request_resource(&iomem_resource, &intel_private.ifp_resource); + if (ret) { + intel_private.ifp_resource.start = 0; + printk("Failed inserting resource into tree\n"); + } + } +} + +static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) +{ + u32 temp_hi, temp_lo; + int ret; + + pci_read_config_dword(pdev, I965_IFPADDR + 4, &temp_hi); + pci_read_config_dword(pdev, I965_IFPADDR, &temp_lo); + + if (!(temp_lo & 0x1)) { + + intel_alloc_chipset_flush_resource(pdev); + + pci_write_config_dword(pdev, I965_IFPADDR + 4, (intel_private.ifp_resource.start >> 32)); + pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); + intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE); + } else { + u64 l64; + + temp_lo &= ~0x1; + l64 = ((u64)temp_hi << 32) | temp_lo; + + intel_private.ifp_resource.start = l64; + intel_private.ifp_resource.end = l64 + PAGE_SIZE; + ret = request_resource(&iomem_resource, &intel_private.ifp_resource); + if (!ret) { + intel_private.ifp_resource.start = 0; + printk("Failed inserting resource into tree\n"); + } + } +} + +void intel_init_chipset_flush_compat(struct drm_device *dev) +{ + struct pci_dev *agp_dev = dev->agp->agp_info.device; + + intel_private.ifp_resource.name = "GMCH IFPBAR"; + intel_private.ifp_resource.flags = IORESOURCE_MEM; + + /* Setup chipset flush for 915 */ + if (IS_I965 || IS_G33) { + intel_i965_g33_setup_chipset_flush(agp_dev); + } else { + intel_i915_setup_chipset_flush(agp_dev); + } + + if (intel_private.ifp_resource.start) { + intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE); + if (!intel_private.flush_page) + printk("unable to ioremap flush page - no chipset flushing"); + } +} + +void intel_fini_chipset_flush_compat(struct drm_device *dev) +{ + iounmap(intel_private.flush_page); + release_resource(&intel_private.ifp_resource); +} + +void drm_agp_chipset_flush(struct drm_device *dev) +{ + if (intel_private.flush_page) + writel(1, intel_private.flush_page); +} +#endif -- cgit v1.2.3 From 6b0b2546c29858866ae1986b3b7254551245967e Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 1 Nov 2007 02:00:36 +1000 Subject: i915: fix compat code on 965/g33 --- linux-core/i915_compat.c | 1 - 1 file changed, 1 deletion(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index 86eb1e1c..969d5977 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -89,7 +89,6 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) pci_write_config_dword(pdev, I965_IFPADDR + 4, (intel_private.ifp_resource.start >> 32)); pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); - intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE); } else { u64 l64; -- cgit v1.2.3 From 7f6bf84c238a1859ffd409c0ef1f1ca7eb5e6e72 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 5 Nov 2007 12:42:22 +1000 Subject: drm: remove lots of spurious whitespace. Kernel "cleanfile" script run. --- linux-core/i915_compat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index 969d5977..3a437a1c 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -91,7 +91,7 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); } else { u64 l64; - + temp_lo &= ~0x1; l64 = ((u64)temp_hi << 32) | temp_lo; -- cgit v1.2.3 From 349eebd567246e3c2d47734772e882ae50723cb9 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 6 Nov 2007 18:00:10 +1100 Subject: i915: compat code doesn't work in i8xx hw. --- linux-core/i915_compat.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index 3a437a1c..b09cc9f2 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -2,6 +2,9 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) +#include "i915_drm.h" +#include "i915_drv.h" + #define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970 #define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980 #define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990 @@ -13,17 +16,6 @@ #define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0 #define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0 -#define IS_I965 (agp_dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB) - -#define IS_G33 (agp_dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \ - agp_dev->device == PCI_DEVICE_ID_INTEL_Q33_HB) - #define I915_IFPADDR 0x60 #define I965_IFPADDR 0x70 @@ -109,11 +101,15 @@ void intel_init_chipset_flush_compat(struct drm_device *dev) { struct pci_dev *agp_dev = dev->agp->agp_info.device; + /* not flush on i8xx */ + if (!IS_I9XX(dev)) + return; + intel_private.ifp_resource.name = "GMCH IFPBAR"; intel_private.ifp_resource.flags = IORESOURCE_MEM; /* Setup chipset flush for 915 */ - if (IS_I965 || IS_G33) { + if (IS_I965G(dev) || IS_G33(dev)) { intel_i965_g33_setup_chipset_flush(agp_dev); } else { intel_i915_setup_chipset_flush(agp_dev); @@ -128,6 +124,10 @@ void intel_init_chipset_flush_compat(struct drm_device *dev) void intel_fini_chipset_flush_compat(struct drm_device *dev) { + /* not flush on i8xx */ + if (!IS_I9XX(dev)) + return; + iounmap(intel_private.flush_page); release_resource(&intel_private.ifp_resource); } -- cgit v1.2.3 From 2eee33ace5b647153a7cf20990efd12313cc8472 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 15 Nov 2007 13:29:55 +1100 Subject: intel: add flushing for i8xx chipsets. Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM code paths --- linux-core/i915_compat.c | 126 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 96 insertions(+), 30 deletions(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index b09cc9f2..e8890f67 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -19,10 +19,15 @@ #define I915_IFPADDR 0x60 #define I965_IFPADDR 0x70 -static struct _intel_private_compat { +static struct _i9xx_private_compat { void __iomem *flush_page; struct resource ifp_resource; -} intel_private; +} i9xx_private; + +static struct _i8xx_private_compat { + void *flush_page; + struct page *page; +} i8xx_private; static void intel_compat_align_resource(void *data, struct resource *res, @@ -35,7 +40,7 @@ intel_compat_align_resource(void *data, struct resource *res, static int intel_alloc_chipset_flush_resource(struct pci_dev *pdev) { int ret; - ret = pci_bus_alloc_resource(pdev->bus, &intel_private.ifp_resource, PAGE_SIZE, + ret = pci_bus_alloc_resource(pdev->bus, &i9xx_private.ifp_resource, PAGE_SIZE, PAGE_SIZE, PCIBIOS_MIN_MEM, 0, intel_compat_align_resource, pdev); if (ret != 0) @@ -53,15 +58,15 @@ static void intel_i915_setup_chipset_flush(struct pci_dev *pdev) if (!(temp & 0x1)) { intel_alloc_chipset_flush_resource(pdev); - pci_write_config_dword(pdev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); + pci_write_config_dword(pdev, I915_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1); } else { temp &= ~1; - intel_private.ifp_resource.start = temp; - intel_private.ifp_resource.end = temp + PAGE_SIZE; - ret = request_resource(&iomem_resource, &intel_private.ifp_resource); + i9xx_private.ifp_resource.start = temp; + i9xx_private.ifp_resource.end = temp + PAGE_SIZE; + ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource); if (ret) { - intel_private.ifp_resource.start = 0; + i9xx_private.ifp_resource.start = 0; printk("Failed inserting resource into tree\n"); } } @@ -79,34 +84,72 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) intel_alloc_chipset_flush_resource(pdev); - pci_write_config_dword(pdev, I965_IFPADDR + 4, (intel_private.ifp_resource.start >> 32)); - pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); + pci_write_config_dword(pdev, I965_IFPADDR + 4, (i9xx_private.ifp_resource.start >> 32)); + pci_write_config_dword(pdev, I965_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1); } else { u64 l64; temp_lo &= ~0x1; l64 = ((u64)temp_hi << 32) | temp_lo; - intel_private.ifp_resource.start = l64; - intel_private.ifp_resource.end = l64 + PAGE_SIZE; - ret = request_resource(&iomem_resource, &intel_private.ifp_resource); + i9xx_private.ifp_resource.start = l64; + i9xx_private.ifp_resource.end = l64 + PAGE_SIZE; + ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource); if (!ret) { - intel_private.ifp_resource.start = 0; + i9xx_private.ifp_resource.start = 0; printk("Failed inserting resource into tree\n"); } } } -void intel_init_chipset_flush_compat(struct drm_device *dev) +static void intel_i8xx_fini_flush(struct drm_device *dev) { - struct pci_dev *agp_dev = dev->agp->agp_info.device; + kunmap(i8xx_private.page); + i8xx_private.flush_page = NULL; + unmap_page_from_agp(i8xx_private.page); + flush_agp_mappings(); - /* not flush on i8xx */ - if (!IS_I9XX(dev)) + __free_page(i8xx_private.page); +} + +static void intel_i8xx_setup_flush(struct drm_device *dev) +{ + + i8xx_private.page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); + if (!i8xx_private.page) { return; + } - intel_private.ifp_resource.name = "GMCH IFPBAR"; - intel_private.ifp_resource.flags = IORESOURCE_MEM; + /* make page uncached */ + map_page_into_agp(i8xx_private.page); + flush_agp_mappings(); + + i8xx_private.flush_page = kmap(i8xx_private.page); + if (!i8xx_private.flush_page) + intel_i8xx_fini_flush(dev); + + DRM_ERROR("i8xx got flush page %p %p\n", i8xx_private.page, i8xx_private.flush_page); +} + + +static void intel_i8xx_flush_page(struct drm_device *dev) +{ + unsigned int *pg = i8xx_private.flush_page; + int i; + + /* HAI NUT CAN I HAZ HAMMER?? */ + for (i = 0; i < 256; i++) + *(pg + i) = i; + + DRM_MEMORYBARRIER(); +} + +static void intel_i9xx_setup_flush(struct drm_device *dev) +{ + struct pci_dev *agp_dev = dev->agp->agp_info.device; + + i9xx_private.ifp_resource.name = "GMCH IFPBAR"; + i9xx_private.ifp_resource.flags = IORESOURCE_MEM; /* Setup chipset flush for 915 */ if (IS_I965G(dev) || IS_G33(dev)) { @@ -115,26 +158,49 @@ void intel_init_chipset_flush_compat(struct drm_device *dev) intel_i915_setup_chipset_flush(agp_dev); } - if (intel_private.ifp_resource.start) { - intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE); - if (!intel_private.flush_page) + if (i9xx_private.ifp_resource.start) { + i9xx_private.flush_page = ioremap_nocache(i9xx_private.ifp_resource.start, PAGE_SIZE); + if (!i9xx_private.flush_page) printk("unable to ioremap flush page - no chipset flushing"); } } -void intel_fini_chipset_flush_compat(struct drm_device *dev) +static void intel_i9xx_fini_flush(struct drm_device *dev) +{ + iounmap(i9xx_private.flush_page); + release_resource(&i9xx_private.ifp_resource); +} + +static void intel_i9xx_flush_page(struct drm_device *dev) +{ + if (i9xx_private.flush_page) + writel(1, i9xx_private.flush_page); +} + +void intel_init_chipset_flush_compat(struct drm_device *dev) { /* not flush on i8xx */ - if (!IS_I9XX(dev)) - return; + if (IS_I9XX(dev)) + intel_i9xx_setup_flush(dev); + else + intel_i8xx_setup_flush(dev); + +} - iounmap(intel_private.flush_page); - release_resource(&intel_private.ifp_resource); +void intel_fini_chipset_flush_compat(struct drm_device *dev) +{ + /* not flush on i8xx */ + if (IS_I9XX(dev)) + intel_i9xx_fini_flush(dev); + else + intel_i8xx_fini_flush(dev); } void drm_agp_chipset_flush(struct drm_device *dev) { - if (intel_private.flush_page) - writel(1, intel_private.flush_page); + if (IS_I9XX(dev)) + intel_i9xx_flush_page(dev); + else + intel_i8xx_flush_page(dev); } #endif -- cgit v1.2.3 From 62cdc6dbb3545d21bc3a68987d0781f277ae6ee4 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 15 Nov 2007 14:43:23 +1100 Subject: i915: remove excess debug output --- linux-core/i915_compat.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index e8890f67..e119a992 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -127,8 +127,6 @@ static void intel_i8xx_setup_flush(struct drm_device *dev) i8xx_private.flush_page = kmap(i8xx_private.page); if (!i8xx_private.flush_page) intel_i8xx_fini_flush(dev); - - DRM_ERROR("i8xx got flush page %p %p\n", i8xx_private.page, i8xx_private.flush_page); } -- cgit v1.2.3 From 2f6e53342156ecb0e61a13816043445032c2b539 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 5 Dec 2007 04:54:58 +1000 Subject: patch from -mm kernel to use upper_32_bits --- linux-core/i915_compat.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index e119a992..58fb8418 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -84,7 +84,8 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) intel_alloc_chipset_flush_resource(pdev); - pci_write_config_dword(pdev, I965_IFPADDR + 4, (i9xx_private.ifp_resource.start >> 32)); + pci_write_config_dword(pdev, I965_IFPADDR + 4, + upper_32_bits(i9xx_private.ifp_resource.start)); pci_write_config_dword(pdev, I965_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1); } else { u64 l64; -- cgit v1.2.3 From 62df4f0a48776e55443d7f61a41e1ed0fb77b6ed Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 14 Jan 2008 19:36:10 +1000 Subject: fixup i915 compat resource allocation --- linux-core/i915_compat.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index 58fb8418..f77260b1 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -21,6 +21,7 @@ static struct _i9xx_private_compat { void __iomem *flush_page; + int resource_valid; struct resource ifp_resource; } i9xx_private; @@ -57,16 +58,17 @@ static void intel_i915_setup_chipset_flush(struct pci_dev *pdev) pci_read_config_dword(pdev, I915_IFPADDR, &temp); if (!(temp & 0x1)) { intel_alloc_chipset_flush_resource(pdev); - + i9xx_private.resource_valid = 1; pci_write_config_dword(pdev, I915_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1); } else { temp &= ~1; + i9xx_private.resource_valid = 1; i9xx_private.ifp_resource.start = temp; i9xx_private.ifp_resource.end = temp + PAGE_SIZE; ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource); if (ret) { - i9xx_private.ifp_resource.start = 0; + i9xx_private.resource_valid = 0; printk("Failed inserting resource into tree\n"); } } @@ -84,6 +86,7 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) intel_alloc_chipset_flush_resource(pdev); + i9xx_private.resource_valid = 1; pci_write_config_dword(pdev, I965_IFPADDR + 4, upper_32_bits(i9xx_private.ifp_resource.start)); pci_write_config_dword(pdev, I965_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1); @@ -93,11 +96,12 @@ static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev) temp_lo &= ~0x1; l64 = ((u64)temp_hi << 32) | temp_lo; + i9xx_private.resource_valid = 1; i9xx_private.ifp_resource.start = l64; i9xx_private.ifp_resource.end = l64 + PAGE_SIZE; ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource); if (!ret) { - i9xx_private.ifp_resource.start = 0; + i9xx_private.resource_valid = 0; printk("Failed inserting resource into tree\n"); } } @@ -167,7 +171,9 @@ static void intel_i9xx_setup_flush(struct drm_device *dev) static void intel_i9xx_fini_flush(struct drm_device *dev) { iounmap(i9xx_private.flush_page); - release_resource(&i9xx_private.ifp_resource); + if (i9xx_private.resource_valid) + release_resource(&i9xx_private.ifp_resource); + i9xx_private.resource_valid = 0; } static void intel_i9xx_flush_page(struct drm_device *dev) -- cgit v1.2.3 From 099e89edf094ec231621b67129e9226ba50e99ad Mon Sep 17 00:00:00 2001 From: Thomas Hellstrom Date: Tue, 15 Jan 2008 09:46:59 +0100 Subject: Define i915_compat.c upper_32_bits for kernels < 2.6.21 --- linux-core/i915_compat.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'linux-core/i915_compat.c') diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c index f77260b1..cc024085 100644 --- a/linux-core/i915_compat.c +++ b/linux-core/i915_compat.c @@ -19,6 +19,10 @@ #define I915_IFPADDR 0x60 #define I965_IFPADDR 0x70 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) +#define upper_32_bits(_val) (((u64)(_val)) >> 32) +#endif + static struct _i9xx_private_compat { void __iomem *flush_page; int resource_valid; -- cgit v1.2.3