From 078bc5b6ee24ea786c465f5e29dcb8b0d2f81b2e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 20 Dec 2011 13:10:36 -0800 Subject: intel: Make intel_chipset handle devid directly. This will make these macros reusable from intel_decode.c, which doesn't have a bufmgr_gem context, without faking the struct. We should generally only be using these macros from bufmgr_gem context setup anyway. Acked-by: Daniel Vetter Acked-by: Eugeni Dodonov --- intel/intel_bufmgr_gem.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'intel/intel_bufmgr_gem.c') diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index eb9dd32f..2b4fab13 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -284,7 +284,8 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, return ALIGN(pitch, 64); if (*tiling_mode == I915_TILING_X - || (IS_915(bufmgr_gem) && *tiling_mode == I915_TILING_Y)) + || (IS_915(bufmgr_gem->pci_device) + && *tiling_mode == I915_TILING_Y)) tile_width = 512; else tile_width = 128; @@ -772,10 +773,11 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, aligned_y = y; height_alignment = 2; - if (IS_GEN2(bufmgr_gem) && tiling != I915_TILING_NONE) + if ((bufmgr_gem->gen == 2) && tiling != I915_TILING_NONE) height_alignment = 16; else if (tiling == I915_TILING_X - || (IS_915(bufmgr_gem) && tiling == I915_TILING_Y)) + || (IS_915(bufmgr_gem->pci_device) + && tiling == I915_TILING_Y)) height_alignment = 8; else if (tiling == I915_TILING_Y) height_alignment = 32; @@ -2313,16 +2315,17 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value); } - if (IS_GEN2(bufmgr_gem)) + if (IS_GEN2(bufmgr_gem->pci_device)) bufmgr_gem->gen = 2; - else if (IS_GEN3(bufmgr_gem)) + else if (IS_GEN3(bufmgr_gem->pci_device)) bufmgr_gem->gen = 3; - else if (IS_GEN4(bufmgr_gem)) + else if (IS_GEN4(bufmgr_gem->pci_device)) bufmgr_gem->gen = 4; else bufmgr_gem->gen = 6; - if (IS_GEN3(bufmgr_gem) && bufmgr_gem->gtt_size > 256*1024*1024) { + if (IS_GEN3(bufmgr_gem->pci_device) && + bufmgr_gem->gtt_size > 256*1024*1024) { /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't * be used for tiled blits. To simplify the accounting, just * substract the unmappable part (fixed to 256MB on all known -- cgit v1.2.3