From dbb0d979cc6c4e1f444cdbbf6dc3571c3818ea39 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sat, 6 Jan 2007 17:50:00 +1100 Subject: nouveau: Use PMC_BOOT_0 to determine which ctx_voodoo to load. --- shared-core/nouveau_reg.h | 1 + shared-core/nv40_graph.c | 9 ++++++--- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index 38a22061..23fce39a 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -45,6 +45,7 @@ # define NV03_FIFO_REGS_DMAPUT(i) (NV03_FIFO_REGS(i)+0x40) # define NV03_FIFO_REGS_DMAGET(i) (NV03_FIFO_REGS(i)+0x44) +#define NV_PMC_BOOT_0 0x00000000 #define NV_PMC_INTSTAT 0x00000100 # define NV_PMC_INTSTAT_PFIFO_PENDING (1<< 8) # define NV_PMC_INTSTAT_PGRAPH_PENDING (1<<12) diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 6e3ef2c2..6a4f138e 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -427,13 +427,16 @@ nv40_graph_init(drm_device_t *dev) (drm_nouveau_private_t *)dev->dev_private; uint32_t *ctx_voodoo; uint32_t pg0220_inst; - int i; + int i, chipset; - switch (dev_priv->card_type) { - case NV_40: + chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20; + DRM_DEBUG("chipset (from PMC_BOOT_0): NV0x%02X\n", chipset); + switch (chipset) { + case 0x40: ctx_voodoo = nv40_ctx_voodoo; break; default: + DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", chipset); ctx_voodoo = NULL; break; } -- cgit v1.2.3