From be5bf1346e49d5c2e0080913fd55e6898a8744cf Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 1 Apr 2007 16:48:38 +1000 Subject: copy over some files and reorg radeon to add ttm fencing not working yet --- linux-core/Makefile.kernel | 2 +- linux-core/radeon_buffer.c | 117 +++++++++++++++++++++++++++++++++++++++++ linux-core/radeon_drv.c | 39 ++++++++++++++ linux-core/radeon_fence.c | 128 +++++++++++++++++++++++++++++++++++++++++++++ shared-core/radeon_drm.h | 9 ++++ shared-core/radeon_drv.h | 48 ++++++++++++++++- shared-core/radeon_irq.c | 20 +++---- 7 files changed, 351 insertions(+), 12 deletions(-) create mode 100644 linux-core/radeon_buffer.c create mode 100644 linux-core/radeon_fence.c diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel index 6f5b021b..510509cc 100644 --- a/linux-core/Makefile.kernel +++ b/linux-core/Makefile.kernel @@ -27,7 +27,7 @@ nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \ nv04_fb.o nv10_fb.o nv40_fb.o \ nv04_graph.o nv10_graph.o nv20_graph.o nv30_graph.o \ nv40_graph.o -radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o +radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o radeon_fence.o radeon_buffer.o sis-objs := sis_drv.o sis_mm.o ffb-objs := ffb_drv.o ffb_context.o savage-objs := savage_drv.o savage_bci.o savage_state.o diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c new file mode 100644 index 00000000..796191c1 --- /dev/null +++ b/linux-core/radeon_buffer.c @@ -0,0 +1,117 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * + **************************************************************************/ +/* + * Authors: Thomas Hellström + */ + +#include "drmP.h" +#include "radeon_drm.h" +#include "radeon_drv.h" + + +drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t * dev) +{ + return drm_agp_init_ttm(dev, NULL); +} + +int radeon_fence_types(drm_buffer_object_t *bo, uint32_t * class, uint32_t * type) +{ + *class = 0; + if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE)) + *type = 3; + else + *type = 1; + return 0; +} + +int radeon_invalidate_caches(drm_device_t * dev, uint32_t flags) +{ + /* + * FIXME: Only emit once per batchbuffer submission. + */ +#if 0 + uint32_t flush_cmd = MI_NO_WRITE_FLUSH; + + if (flags & DRM_BO_FLAG_READ) + flush_cmd |= MI_READ_FLUSH; + if (flags & DRM_BO_FLAG_EXE) + flush_cmd |= MI_EXE_FLUSH; + + return 0; +// return radeon_emit_mi_flush(dev, flush_cmd); +#endif + return 0; +} + +uint32_t radeon_evict_mask(drm_buffer_object_t *bo) +{ + switch (bo->mem.mem_type) { + case DRM_BO_MEM_LOCAL: + case DRM_BO_MEM_TT: + return DRM_BO_FLAG_MEM_LOCAL; + default: + return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED; + } +} + +int radeon_init_mem_type(drm_device_t * dev, uint32_t type, + drm_mem_type_manager_t * man) +{ + switch (type) { + case DRM_BO_MEM_LOCAL: + man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | + _DRM_FLAG_MEMTYPE_CACHED; + man->drm_bus_maptype = 0; + break; + case DRM_BO_MEM_TT: + if (!(drm_core_has_AGP(dev) && dev->agp)) { + DRM_ERROR("AGP is not enabled for memory type %u\n", + (unsigned)type); + return -EINVAL; + } + man->io_offset = dev->agp->agp_info.aper_base; + man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024; + man->io_addr = NULL; + man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | + _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP; + man->drm_bus_maptype = _DRM_AGP; + break; + default: + DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); + return -EINVAL; + } + return 0; +} + +int radeon_move(drm_buffer_object_t * bo, + int evict, int no_wait, drm_bo_mem_reg_t * new_mem) +{ + + return 0; +} + diff --git a/linux-core/radeon_drv.c b/linux-core/radeon_drv.c index 43b9aca0..6f63a7c4 100644 --- a/linux-core/radeon_drv.c +++ b/linux-core/radeon_drv.c @@ -56,6 +56,38 @@ static struct pci_device_id pciidlist[] = { radeon_PCI_IDS }; + +#ifdef RADEON_HAVE_FENCE +static drm_fence_driver_t radeon_fence_driver = { + .num_classes = 1, + .wrap_diff = (1 << 30), + .flush_diff = (1 << 29), + .sequence_mask = 0xffffffffU, + .lazy_capable = 1, + .emit = radeon_fence_emit_sequence, + .poke_flush = radeon_poke_flush, + .has_irq = radeon_fence_has_irq, +}; +#endif +#ifdef RADEON_HAVE_BUFFER + +static uint32_t radeon_mem_prios[] = {DRM_BO_MEM_PRIV0, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL}; +static uint32_t radeon_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_PRIV0, DRM_BO_MEM_LOCAL}; + +static drm_bo_driver_t radeon_bo_driver = { + .mem_type_prio = radeon_mem_prios, + .mem_busy_prio = radeon_busy_prios, + .num_mem_type_prio = sizeof(radeon_mem_prios)/sizeof(uint32_t), + .num_mem_busy_prio = sizeof(radeon_busy_prios)/sizeof(uint32_t), + .create_ttm_backend_entry = radeon_create_ttm_backend_entry, + .fence_type = radeon_fence_types, + .invalidate_caches = radeon_invalidate_caches, + .init_mem_type = radeon_init_mem_type, + .evict_mask = radeon_evict_mask, + .move = radeon_move, +}; +#endif + static int probe(struct pci_dev *pdev, const struct pci_device_id *ent); static struct drm_driver driver = { .driver_features = @@ -100,6 +132,13 @@ static struct drm_driver driver = { .remove = __devexit_p(drm_cleanup_pci), }, +#ifdef RADEON_HAVE_FENCE + .fence_driver = &radeon_fence_driver, +#endif +#ifdef RADEON_HAVE_BUFFER + .bo_driver = &radeon_bo_driver, +#endif + .name = DRIVER_NAME, .desc = DRIVER_DESC, .date = DRIVER_DATE, diff --git a/linux-core/radeon_fence.c b/linux-core/radeon_fence.c new file mode 100644 index 00000000..57b318af --- /dev/null +++ b/linux-core/radeon_fence.c @@ -0,0 +1,128 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * + **************************************************************************/ +/* + * Authors: Thomas Hellström + */ + +#include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_drv.h" + +/* + * Implements an intel sync flush operation. + */ + +static void radeon_perform_flush(drm_device_t * dev) +{ + drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; + drm_fence_manager_t *fm = &dev->fm; + drm_fence_class_manager_t *fc = &dev->fm.class[0]; + drm_fence_driver_t *driver = dev->driver->fence_driver; + uint32_t pending_flush_types = 0; + uint32_t flush_flags = 0; + uint32_t flush_sequence = 0; + uint32_t i_status; + uint32_t diff; + uint32_t sequence; + + if (!dev_priv) + return; + + pending_flush_types = fc->pending_flush | + ((fc->pending_exe_flush) ? DRM_FENCE_TYPE_EXE : 0); + + if (pending_flush_types) { + drm_fence_handler(dev, 0, 0,0); + + } + + return; +} + +void radeon_poke_flush(drm_device_t * dev, uint32_t class) +{ + drm_fence_manager_t *fm = &dev->fm; + unsigned long flags; + + if (class != 0) + return; + + write_lock_irqsave(&fm->lock, flags); + radeon_perform_flush(dev); + write_unlock_irqrestore(&fm->lock, flags); +} + +int radeon_fence_emit_sequence(drm_device_t *dev, uint32_t class, + uint32_t flags, uint32_t *sequence, + uint32_t *native_type) +{ + drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; + RING_LOCALS; + + if (!dev_priv) + return -EINVAL; + + *native_type = DRM_FENCE_TYPE_EXE; + if (flags & DRM_RADEON_FENCE_FLAG_FLUSHED) { + *native_type |= DRM_RADEON_FENCE_TYPE_RW; + + BEGIN_RING(4); + + RADEON_FLUSH_CACHE(); + RADEON_FLUSH_ZCACHE(); + ADVANCE_RING(); + } + + radeon_emit_irq(dev); + *sequence = (uint32_t) dev_priv->counter; + + + return 0; +} + +void radeon_fence_handler(drm_device_t * dev) +{ + drm_fence_manager_t *fm = &dev->fm; + + write_lock(&fm->lock); + radeon_perform_flush(dev); + write_unlock(&fm->lock); +} + +int radeon_fence_has_irq(drm_device_t *dev, uint32_t class, uint32_t flags) +{ + /* + * We have an irq that tells us when we have a new breadcrumb. + */ + + if (class == 0 && flags == DRM_FENCE_TYPE_EXE) + return 1; + + return 0; +} diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h index e96e7851..bdf45802 100644 --- a/shared-core/radeon_drm.h +++ b/shared-core/radeon_drm.h @@ -434,8 +434,17 @@ typedef struct { int pfCurrentPage; /* which buffer is being displayed? */ int crtc2_base; /* CRTC2 frame offset */ int tiling_enabled; /* set by drm, read by 2d + 3d clients */ + + unsigned int last_fence; } drm_radeon_sarea_t; +/* The only fence class we support */ +#define DRM_RADEON_FENCE_CLASS_ACCEL 0 +/* Fence type that guarantees read-write flush */ +#define DRM_RADEON_FENCE_TYPE_RW 2 +/* cache flushes programmed just before the fence */ +#define DRM_RADEON_FENCE_FLAG_FLUSHED 0x01000000 + /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmRadeon.h) * diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index 3e56af30..9f6cff89 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -102,6 +102,11 @@ #define DRIVER_MINOR 26 #define DRIVER_PATCHLEVEL 0 +#if defined(__linux__) +#define RADEON_HAVE_FENCE +#define RADEON_HAVE_BUFFER +#endif + /* * Radeon chip families */ @@ -276,8 +281,8 @@ typedef struct drm_radeon_private { struct mem_block *fb_heap; /* SW interrupt */ - wait_queue_head_t swi_queue; - atomic_t swi_emitted; + wait_queue_head_t irq_queue; + int counter; struct radeon_surface surfaces[RADEON_MAX_SURFACES]; struct radeon_virt_surface virt_surfaces[2*RADEON_MAX_SURFACES]; @@ -376,6 +381,30 @@ extern int r300_do_cp_cmdbuf(drm_device_t *dev, DRMFILE filp, drm_file_t* filp_priv, drm_radeon_kcmd_buffer_t* cmdbuf); + +#ifdef RADEON_HAVE_FENCE +/* i915_fence.c */ + + +extern void radeon_fence_handler(drm_device_t *dev); +extern int radeon_fence_emit_sequence(drm_device_t *dev, uint32_t class, + uint32_t flags, uint32_t *sequence, + uint32_t *native_type); +extern void radeon_poke_flush(drm_device_t *dev, uint32_t class); +extern int radeon_fence_has_irq(drm_device_t *dev, uint32_t class, uint32_t flags); +#endif + +#ifdef RADEON_HAVE_BUFFER +/* radeon_buffer.c */ +extern drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t *dev); +extern int radeon_fence_types(struct drm_buffer_object *bo, uint32_t *class, uint32_t *type); +extern int radeon_invalidate_caches(drm_device_t *dev, uint32_t buffer_flags); +extern uint32_t radeon_evict_mask(drm_buffer_object_t *bo); +extern int radeon_init_mem_type(drm_device_t * dev, uint32_t type, + drm_mem_type_manager_t * man); +extern int radeon_move(drm_buffer_object_t * bo, + int evict, int no_wait, drm_bo_mem_reg_t * new_mem); +#endif /* Flags for stats.boxes */ #define RADEON_BOX_DMA_IDLE 0x1 @@ -1184,4 +1213,19 @@ do { \ write &= mask; \ } while (0) +/* Breadcrumb - swi irq */ +#define READ_BREADCRUMB(dev_priv) RADEON_READ(RADEON_LAST_SWI_REG) + +static inline int radeon_update_breadcrumb(drm_device_t *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + dev_priv->sarea_priv->last_fence = ++dev_priv->counter; + + if (dev_priv->counter > 0x7FFFFFFFUL) + dev_priv->sarea_priv->last_fence = dev_priv->counter = 1; + + return dev_priv->counter; +} + #endif /* __RADEON_DRV_H__ */ diff --git a/shared-core/radeon_irq.c b/shared-core/radeon_irq.c index 3ff0baa2..8678f5d1 100644 --- a/shared-core/radeon_irq.c +++ b/shared-core/radeon_irq.c @@ -79,7 +79,10 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS) /* SW interrupt */ if (stat & RADEON_SW_INT_TEST) { - DRM_WAKEUP(&dev_priv->swi_queue); + DRM_WAKEUP(&dev_priv->irq_queue); +#ifdef RADEON_HAVE_FENCE + radeon_fence_handler(dev); +#endif } /* VBLANK interrupt */ @@ -98,8 +101,7 @@ static int radeon_emit_irq(drm_device_t * dev) unsigned int ret; RING_LOCALS; - atomic_inc(&dev_priv->swi_emitted); - ret = atomic_read(&dev_priv->swi_emitted); + ret = radeon_update_breadcrumb(dev); BEGIN_RING(4); OUT_RING_REG(RADEON_LAST_SWI_REG, ret); @@ -110,19 +112,19 @@ static int radeon_emit_irq(drm_device_t * dev) return ret; } -static int radeon_wait_irq(drm_device_t * dev, int swi_nr) +static int radeon_wait_irq(drm_device_t * dev, int irq_nr) { drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; int ret = 0; - if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr) + if (READ_BREADCRUMB(dev_priv) >= irq_nr) return 0; dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ, - RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr); + DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, + READ_BREADCRUMB(dev_priv) >= irq_nr); return ret; } @@ -224,8 +226,8 @@ void radeon_driver_irq_postinstall(drm_device_t * dev) drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; - atomic_set(&dev_priv->swi_emitted, 0); - DRM_INIT_WAITQUEUE(&dev_priv->swi_queue); + dev_priv->counter = 0; + DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); /* Turn on SW and VBL ints */ RADEON_WRITE(RADEON_GEN_INT_CNTL, -- cgit v1.2.3 From b1f0b2d960a8f488332652677073ab95ce72cd3f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 1 Apr 2007 18:24:23 +1000 Subject: radeon: de-static irq function, fixup fence/buffer --- linux-core/radeon_buffer.c | 23 ++++++++++------------- linux-core/radeon_fence.c | 9 +++------ shared-core/radeon_drv.h | 1 + shared-core/radeon_irq.c | 2 +- 4 files changed, 15 insertions(+), 20 deletions(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 796191c1..b525ddfa 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -51,20 +51,13 @@ int radeon_fence_types(drm_buffer_object_t *bo, uint32_t * class, uint32_t * typ int radeon_invalidate_caches(drm_device_t * dev, uint32_t flags) { - /* - * FIXME: Only emit once per batchbuffer submission. - */ -#if 0 - uint32_t flush_cmd = MI_NO_WRITE_FLUSH; + drm_radeon_private_t *dev_priv = dev->dev_private; + RING_LOCALS; - if (flags & DRM_BO_FLAG_READ) - flush_cmd |= MI_READ_FLUSH; - if (flags & DRM_BO_FLAG_EXE) - flush_cmd |= MI_EXE_FLUSH; - - return 0; -// return radeon_emit_mi_flush(dev, flush_cmd); -#endif + BEGIN_RING(4); + RADEON_FLUSH_CACHE(); + RADEON_FLUSH_ZCACHE(); + ADVANCE_RING(); return 0; } @@ -111,7 +104,11 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, int radeon_move(drm_buffer_object_t * bo, int evict, int no_wait, drm_bo_mem_reg_t * new_mem) { + drm_bo_mem_reg_t *old_mem = &bo->mem; + if (old_mem->mem_type == DRM_BO_MEM_LOCAL) { + return drm_bo_move_memcpy(bo, evict, no_wait, new_mem); + } return 0; } diff --git a/linux-core/radeon_fence.c b/linux-core/radeon_fence.c index 57b318af..7de3650d 100644 --- a/linux-core/radeon_fence.c +++ b/linux-core/radeon_fence.c @@ -45,10 +45,6 @@ static void radeon_perform_flush(drm_device_t * dev) drm_fence_class_manager_t *fc = &dev->fm.class[0]; drm_fence_driver_t *driver = dev->driver->fence_driver; uint32_t pending_flush_types = 0; - uint32_t flush_flags = 0; - uint32_t flush_sequence = 0; - uint32_t i_status; - uint32_t diff; uint32_t sequence; if (!dev_priv) @@ -58,8 +54,9 @@ static void radeon_perform_flush(drm_device_t * dev) ((fc->pending_exe_flush) ? DRM_FENCE_TYPE_EXE : 0); if (pending_flush_types) { - drm_fence_handler(dev, 0, 0,0); - + sequence = READ_BREADCRUMB(dev_priv); + + drm_fence_handler(dev, 0, sequence, pending_flush_types); } return; diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index 9f6cff89..6d2bcc8f 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -355,6 +355,7 @@ extern void radeon_mem_release(DRMFILE filp, struct mem_block *heap); /* radeon_irq.c */ extern int radeon_irq_emit(DRM_IOCTL_ARGS); extern int radeon_irq_wait(DRM_IOCTL_ARGS); +extern int radeon_emit_irq(drm_device_t * dev); extern void radeon_do_release(drm_device_t * dev); extern int radeon_driver_vblank_wait(drm_device_t * dev, diff --git a/shared-core/radeon_irq.c b/shared-core/radeon_irq.c index 8678f5d1..4f3099dc 100644 --- a/shared-core/radeon_irq.c +++ b/shared-core/radeon_irq.c @@ -95,7 +95,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS) return IRQ_HANDLED; } -static int radeon_emit_irq(drm_device_t * dev) +int radeon_emit_irq(drm_device_t * dev) { drm_radeon_private_t *dev_priv = dev->dev_private; unsigned int ret; -- cgit v1.2.3 From bdc5a8b62ef2f59e05f69da2150212c0243f6efb Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 1 Apr 2007 19:09:00 +1000 Subject: radeon: enable buffer manager --- shared-core/radeon_cp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index e02796e7..93c75d10 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -2244,6 +2244,9 @@ int radeon_driver_firstopen(struct drm_device *dev) if (ret != 0) return ret; +#ifdef RADEON_HAVE_BUFFER + drm_bo_driver_init(dev); +#endif return 0; } -- cgit v1.2.3 From e835820e2359952bd42a66137c6b7ab243a5a541 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 3 Apr 2007 19:04:48 +1000 Subject: add initial PCIE GART framework for TTM --- linux-core/ati_pcigart.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++ linux-core/drmP.h | 3 ++ linux-core/radeon_buffer.c | 7 +++- 3 files changed, 94 insertions(+), 1 deletion(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index bb30dd74..f3f91129 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -228,3 +228,88 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) return ret; } EXPORT_SYMBOL(drm_ati_pcigart_init); + +static int ati_pcigart_needs_unbind_cache_adjust(drm_ttm_backend_t *backend) +{ + return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1); +} + +static int ati_pcigart_populate(drm_ttm_backend_t *backend, + unsigned long num_pages, + struct page **pages) +{ + ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + + return -1; +} + +static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, + unsigned long offset, + int cached) +{ + ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + + return -1; +} + +static int ati_pcigart_unbind_ttm(drm_ttm_backend_t *backend) +{ + ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + + return -1; +} + +static void ati_pcigart_clear_ttm(drm_ttm_backend_t *backend) +{ + ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; +} + +static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) +{ + ati_pcigart_ttm_priv *atipci_priv; + + if (backend) { + DRM_DEBUG("\n"); + atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + if (atipci_priv) { + drm_ctl_free(atipci_priv, sizeof(*atipci_priv), DRM_MEM_MAPPINGS); + backend->private = NULL; + } + if (backend->flags & DRM_BE_FLAG_NEEDS_FREE) { + drm_ctl_free(backend, sizeof(*backend), DRM_MEM_MAPPINGS); + } + } +} + + +drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, + drm_ttm_backend_t *backend) +{ + drm_ttm_backend_t *atipci_be; + ati_pcigart_ttm_priv *atipci_priv; + + atipci_be = (backend != NULL) ? backend : + drm_ctl_calloc(1, sizeof (*atipci_be), DRM_MEM_MAPPINGS); + + if (!atipci_be) + return NULL; + + atipci_priv = drm_ctl_calloc(1, sizeof(*atipci_priv), DRM_MEM_MAPPINGS); + if (!atipci_priv) { + drm_ctl_free(atipci_be, sizeof(*atipci_be), DRM_MEM_MAPPINGS); + return NULL; + } + + atipci_priv->populated = FALSE; + atipci_be->needs_ub_cache_adjust = ati_pcigart_needs_unbind_cache_adjust; + atipci_be->populate = ati_pcigart_populate; + atipci_be->clear = ati_pcigart_clear_ttm; + atipci_be->bind = ati_pcigart_bind_ttm; + atipci_be->unbind = ati_pcigart_unbind_ttm; + atipci_be->destroy = ati_pcigart_destroy_ttm; + + DRM_FLAG_MASKED(atipci_be->flags, (backend == NULL) ? DRM_BE_FLAG_NEEDS_FREE : 0, DRM_BE_FLAG_NEEDS_FREE); + atipci_be->drm_map_type = _DRM_SCATTER_GATHER; + return atipci_be; +} +EXPORT_SYMBOL(ati_pcigart_init_ttm); diff --git a/linux-core/drmP.h b/linux-core/drmP.h index 648e29bc..b6da6926 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -840,6 +840,9 @@ typedef struct drm_agp_ttm_priv { } drm_agp_ttm_priv; #endif +typedef struct ati_pcigart_ttm_priv { + int populated; +} ati_pcigart_ttm_priv; static __inline__ int drm_core_check_feature(struct drm_device *dev, int feature) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index b525ddfa..d5a1456a 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -36,7 +36,12 @@ drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t * dev) { - return drm_agp_init_ttm(dev, NULL); + drm_radeon_private_t *dev_priv = dev->dev_private; + + if(dev_priv->flags & RADEON_IS_AGP) + return drm_agp_init_ttm(dev, NULL); + else + return ati_pcigart_init_ttm(dev, NULL); } int radeon_fence_types(drm_buffer_object_t *bo, uint32_t * class, uint32_t * type) -- cgit v1.2.3 From 29ac7b1fe364a4be1db7e22d2b400bef04fc240d Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 3 Apr 2007 21:20:00 +1000 Subject: radeon: add setup for PCIE GART ttm --- linux-core/ati_pcigart.c | 32 +++++++++++++++++++++++++++++++- linux-core/drmP.h | 8 ++++++++ linux-core/radeon_buffer.c | 30 ++++++++++++++++++++---------- 3 files changed, 59 insertions(+), 11 deletions(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index f3f91129..108e1875 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -239,8 +239,22 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, struct page **pages) { ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + struct page **cur_page, **last_page = pages + num_pages; + struct ati_pcigart_memory *mem; - return -1; + DRM_DEBUG("%d\n", num_pages); + if (drm_alloc_memctl(num_pages * sizeof(void *))) + return -1; + + mem = drm_alloc(sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); + if (!mem) { + drm_free_memctl(num_pages * sizeof(void *)); + return -1; + } + + mem->page_count = num_pages; + atipci_priv->mem = mem; + return 0; } static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, @@ -249,6 +263,7 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, { ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + DRM_DEBUG("\n"); return -1; } @@ -256,12 +271,24 @@ static int ati_pcigart_unbind_ttm(drm_ttm_backend_t *backend) { ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + DRM_DEBUG("\n"); return -1; } static void ati_pcigart_clear_ttm(drm_ttm_backend_t *backend) { ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + struct ati_pcigart_memory *mem = atipci_priv->mem; + + DRM_DEBUG("\n"); + if (mem) { + unsigned long num_pages = mem->page_count; + backend->unbind(backend); + /* free test */ + drm_free(mem, sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); + drm_free_memctl(num_pages * sizeof(void *)); + } + atipci_priv->mem = NULL; } static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) @@ -272,6 +299,9 @@ static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) DRM_DEBUG("\n"); atipci_priv = (ati_pcigart_ttm_priv *)backend->private; if (atipci_priv) { + if (atipci_priv->mem) { + backend->clear(backend); + } drm_ctl_free(atipci_priv, sizeof(*atipci_priv), DRM_MEM_MAPPINGS); backend->private = NULL; } diff --git a/linux-core/drmP.h b/linux-core/drmP.h index b6da6926..3ddd405f 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -840,8 +840,16 @@ typedef struct drm_agp_ttm_priv { } drm_agp_ttm_priv; #endif +#define ATI_PCIGART_FLAG_VMALLOC 1 +struct ati_pcigart_memory { + size_t page_count; + unsigned long *memory; + int flags; +}; + typedef struct ati_pcigart_ttm_priv { int populated; + struct ati_pcigart_memory *mem; } ati_pcigart_ttm_priv; static __inline__ int drm_core_check_feature(struct drm_device *dev, diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index d5a1456a..dd387604 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -80,6 +80,8 @@ uint32_t radeon_evict_mask(drm_buffer_object_t *bo) int radeon_init_mem_type(drm_device_t * dev, uint32_t type, drm_mem_type_manager_t * man) { + drm_radeon_private_t *dev_priv = dev->dev_private; + switch (type) { case DRM_BO_MEM_LOCAL: man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | @@ -87,17 +89,25 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, man->drm_bus_maptype = 0; break; case DRM_BO_MEM_TT: - if (!(drm_core_has_AGP(dev) && dev->agp)) { - DRM_ERROR("AGP is not enabled for memory type %u\n", - (unsigned)type); - return -EINVAL; + if (dev_priv->flags & RADEON_IS_AGP) { + if (!(drm_core_has_AGP(dev) && dev->agp)) { + DRM_ERROR("AGP is not enabled for memory type %u\n", + (unsigned)type); + return -EINVAL; + } + man->io_offset = dev->agp->agp_info.aper_base; + man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024; + man->io_addr = NULL; + man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | + _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP; + man->drm_bus_maptype = _DRM_AGP; + } else { + man->io_offset = 0; + man->io_size = dev_priv->gart_size; + man->io_addr = NULL; + man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE; + man->drm_bus_maptype = _DRM_SCATTER_GATHER; } - man->io_offset = dev->agp->agp_info.aper_base; - man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024; - man->io_addr = NULL; - man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | - _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP; - man->drm_bus_maptype = _DRM_AGP; break; default: DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); -- cgit v1.2.3 From 704ca0638977f58742a8bff6aba9905fe862cfb3 Mon Sep 17 00:00:00 2001 From: David Airlie Date: Fri, 1 Jun 2007 18:12:45 +1000 Subject: WIP more code for radeon --- linux-core/ati_pcigart.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index 108e1875..ad47ed25 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -234,6 +234,19 @@ static int ati_pcigart_needs_unbind_cache_adjust(drm_ttm_backend_t *backend) return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1); } +void ati_pcigart_alloc_page_array(size_t size, struct ati_pcigart_memory *mem) +{ + mem->memory = NULL; + mem->flags = 0; + + if (size <= 2*PAGE_SIZE) + mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY); + if (mem->memory == NULL) { + mem->memory = vmalloc(size); + mem->flags |= ATI_PCIGART_FLAG_VMALLOC; + } +} + static int ati_pcigart_populate(drm_ttm_backend_t *backend, unsigned long num_pages, struct page **pages) @@ -241,6 +254,7 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; struct page **cur_page, **last_page = pages + num_pages; struct ati_pcigart_memory *mem; + unsigned long alloc_size = num_pages * sizeof(struct page *); DRM_DEBUG("%d\n", num_pages); if (drm_alloc_memctl(num_pages * sizeof(void *))) @@ -252,7 +266,11 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, return -1; } - mem->page_count = num_pages; + ati_pcigart_alloc_page_array(alloc_size, mem); + mem->page_count = 0; + for (cur_page = pages; cur_page < last_page; ++cur_page) { + mem->memory[mem->page_count++] = page_to_phys(*cur_page); + } atipci_priv->mem = mem; return 0; } @@ -262,7 +280,19 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, int cached) { ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + struct ati_pcigart_memory *mem = atipci_priv->mem; + off_t j; + + j = offset; + while (j < (pg_start + mem->page_count)) { + j++; + } + + for (i = 0, j = offset; i < mem->page_count; i++, j++) { + /* write value */ + } + /* need to traverse table and add entries */ DRM_DEBUG("\n"); return -1; } -- cgit v1.2.3 From 77b9d9d16b1d1f1715722182d5893aa202f73074 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 10:35:41 +1000 Subject: cleanup pcigart ttm for new backend layout --- linux-core/ati_pcigart.c | 94 ++++++++++++++++++++++------------------------ linux-core/drmP.h | 6 ++- linux-core/radeon_buffer.c | 4 +- 3 files changed, 50 insertions(+), 54 deletions(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index 66742bbc..08dbfe6c 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -261,7 +261,8 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, unsigned long num_pages, struct page **pages) { - ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + ati_pcigart_ttm_backend_t *atipci_be = + container_of(backend, ati_pcigart_ttm_backend_t, backend); struct page **cur_page, **last_page = pages + num_pages; struct ati_pcigart_memory *mem; unsigned long alloc_size = num_pages * sizeof(struct page *); @@ -281,7 +282,7 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, for (cur_page = pages; cur_page < last_page; ++cur_page) { mem->memory[mem->page_count++] = page_to_phys(*cur_page); } - atipci_priv->mem = mem; + atipci_be->mem = mem; return 0; } @@ -289,18 +290,20 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, unsigned long offset, int cached) { - ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; - struct ati_pcigart_memory *mem = atipci_priv->mem; + ati_pcigart_ttm_backend_t *atipci_be = + container_of(backend, ati_pcigart_ttm_backend_t, backend); + + struct ati_pcigart_memory *mem = atipci_be->mem; off_t j; j = offset; - while (j < (pg_start + mem->page_count)) { + while (j < (offset + mem->page_count)) { j++; } - for (i = 0, j = offset; i < mem->page_count; i++, j++) { +// for (i = 0, j = offset; i < mem->page_count; i++, j++) { /* write value */ - } +// } /* need to traverse table and add entries */ DRM_DEBUG("\n"); @@ -309,7 +312,8 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, static int ati_pcigart_unbind_ttm(drm_ttm_backend_t *backend) { - ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; + ati_pcigart_ttm_backend_t *atipci_be = + container_of(backend, ati_pcigart_ttm_backend_t, backend); DRM_DEBUG("\n"); return -1; @@ -317,69 +321,59 @@ static int ati_pcigart_unbind_ttm(drm_ttm_backend_t *backend) static void ati_pcigart_clear_ttm(drm_ttm_backend_t *backend) { - ati_pcigart_ttm_priv *atipci_priv = (ati_pcigart_ttm_priv *)backend->private; - struct ati_pcigart_memory *mem = atipci_priv->mem; + ati_pcigart_ttm_backend_t *atipci_be = + container_of(backend, ati_pcigart_ttm_backend_t, backend); + struct ati_pcigart_memory *mem = atipci_be->mem; DRM_DEBUG("\n"); if (mem) { unsigned long num_pages = mem->page_count; - backend->unbind(backend); + backend->func->unbind(backend); /* free test */ - drm_free(mem, sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); - drm_free_memctl(num_pages * sizeof(void *)); +// drm_free(mem, sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); +// drm_free_memctl(num_pages * sizeof(void *)); } - atipci_priv->mem = NULL; + atipci_be->mem = NULL; } static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) { - ati_pcigart_ttm_priv *atipci_priv; - + ati_pcigart_ttm_backend_t *atipci_be; if (backend) { DRM_DEBUG("\n"); - atipci_priv = (ati_pcigart_ttm_priv *)backend->private; - if (atipci_priv) { - if (atipci_priv->mem) { - backend->clear(backend); + atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); + if (atipci_be) { + if (atipci_be->mem) { + backend->func->clear(backend); } - drm_ctl_free(atipci_priv, sizeof(*atipci_priv), DRM_MEM_MAPPINGS); - backend->private = NULL; - } - if (backend->flags & DRM_BE_FLAG_NEEDS_FREE) { - drm_ctl_free(backend, sizeof(*backend), DRM_MEM_MAPPINGS); + drm_ctl_free(atipci_be, sizeof(*atipci_be), DRM_MEM_TTM); } } } - -drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, - drm_ttm_backend_t *backend) +static drm_ttm_backend_func_t ati_pcigart_ttm_backend = { - drm_ttm_backend_t *atipci_be; - ati_pcigart_ttm_priv *atipci_priv; - - atipci_be = (backend != NULL) ? backend : - drm_ctl_calloc(1, sizeof (*atipci_be), DRM_MEM_MAPPINGS); + .needs_ub_cache_adjust = ati_pcigart_needs_unbind_cache_adjust, + .populate = ati_pcigart_populate, + .clear = ati_pcigart_clear_ttm, + .bind = ati_pcigart_bind_ttm, + .unbind = ati_pcigart_unbind_ttm, + .destroy = ati_pcigart_destroy_ttm, +}; + +drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info) +{ + ati_pcigart_ttm_backend_t *atipci_be; + atipci_be = drm_ctl_calloc(1, sizeof (*atipci_be), DRM_MEM_TTM); if (!atipci_be) return NULL; - - atipci_priv = drm_ctl_calloc(1, sizeof(*atipci_priv), DRM_MEM_MAPPINGS); - if (!atipci_priv) { - drm_ctl_free(atipci_be, sizeof(*atipci_be), DRM_MEM_MAPPINGS); - return NULL; - } - - atipci_priv->populated = FALSE; - atipci_be->needs_ub_cache_adjust = ati_pcigart_needs_unbind_cache_adjust; - atipci_be->populate = ati_pcigart_populate; - atipci_be->clear = ati_pcigart_clear_ttm; - atipci_be->bind = ati_pcigart_bind_ttm; - atipci_be->unbind = ati_pcigart_unbind_ttm; - atipci_be->destroy = ati_pcigart_destroy_ttm; - DRM_FLAG_MASKED(atipci_be->flags, (backend == NULL) ? DRM_BE_FLAG_NEEDS_FREE : 0, DRM_BE_FLAG_NEEDS_FREE); - atipci_be->drm_map_type = _DRM_SCATTER_GATHER; - return atipci_be; + atipci_be->populated = 0; + atipci_be->backend.func = &ati_pcigart_ttm_backend; + atipci_be->backend.mem_type = DRM_BO_MEM_TT; + atipci_be->gart_info = info; + + return &atipci_be->backend; } EXPORT_SYMBOL(ati_pcigart_init_ttm); diff --git a/linux-core/drmP.h b/linux-core/drmP.h index ec432b2a..ef9e133a 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -850,10 +850,12 @@ struct ati_pcigart_memory { int flags; }; -typedef struct ati_pcigart_ttm_priv { +typedef struct ati_pcigart_ttm_backend { + drm_ttm_backend_t backend; int populated; + struct ati_pcigart_info *gart_info; struct ati_pcigart_memory *mem; -} ati_pcigart_ttm_priv; +} ati_pcigart_ttm_backend_t; static __inline__ int drm_core_check_feature(struct drm_device *dev, int feature) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index dd387604..a90dae83 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -39,9 +39,9 @@ drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t * dev) drm_radeon_private_t *dev_priv = dev->dev_private; if(dev_priv->flags & RADEON_IS_AGP) - return drm_agp_init_ttm(dev, NULL); + return drm_agp_init_ttm(dev); else - return ati_pcigart_init_ttm(dev, NULL); + return ati_pcigart_init_ttm(dev, &dev_priv->gart_info); } int radeon_fence_types(drm_buffer_object_t *bo, uint32_t * class, uint32_t * type) -- cgit v1.2.3 From 234a9062009e48bf7b6c7239564ab95b3bcb06aa Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 10:47:42 +1000 Subject: WIP cleanup --- linux-core/ati_pcigart.c | 81 ++++++++++++++++-------------------------------- linux-core/drmP.h | 11 ++----- 2 files changed, 30 insertions(+), 62 deletions(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index 08dbfe6c..44229a0d 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -35,6 +35,24 @@ # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ +static __inline__ void insert_page_into_table(struct ati_pcigart_info *info, u32 page_base, u32 *pci_gart) +{ + switch(info->gart_reg_if) { + case DRM_ATI_GART_IGP: + *pci_gart = cpu_to_le32((page_base) | 0xc); + break; + case DRM_ATI_GART_PCIE: + *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); + break; + default: + case DRM_ATI_GART_PCI: + *pci_gart = cpu_to_le32(page_base); + break; + } +} + + + static void *drm_ati_alloc_pcigart_table(int order) { unsigned long address; @@ -207,18 +225,7 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) page_base = (u32) entry->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { - switch(gart_info->gart_reg_if) { - case DRM_ATI_GART_IGP: - *pci_gart = cpu_to_le32((page_base) | 0xc); - break; - case DRM_ATI_GART_PCIE: - *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); - break; - default: - case DRM_ATI_GART_PCI: - *pci_gart = cpu_to_le32(page_base); - break; - } + insert_page_into_table(gart_info, page_base, pci_gart); pci_gart++; page_base += ATI_PCIGART_PAGE_SIZE; } @@ -244,45 +251,16 @@ static int ati_pcigart_needs_unbind_cache_adjust(drm_ttm_backend_t *backend) return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1); } -void ati_pcigart_alloc_page_array(size_t size, struct ati_pcigart_memory *mem) -{ - mem->memory = NULL; - mem->flags = 0; - - if (size <= 2*PAGE_SIZE) - mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY); - if (mem->memory == NULL) { - mem->memory = vmalloc(size); - mem->flags |= ATI_PCIGART_FLAG_VMALLOC; - } -} - static int ati_pcigart_populate(drm_ttm_backend_t *backend, unsigned long num_pages, struct page **pages) { ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); - struct page **cur_page, **last_page = pages + num_pages; - struct ati_pcigart_memory *mem; - unsigned long alloc_size = num_pages * sizeof(struct page *); DRM_DEBUG("%d\n", num_pages); - if (drm_alloc_memctl(num_pages * sizeof(void *))) - return -1; - - mem = drm_alloc(sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); - if (!mem) { - drm_free_memctl(num_pages * sizeof(void *)); - return -1; - } - - ati_pcigart_alloc_page_array(alloc_size, mem); - mem->page_count = 0; - for (cur_page = pages; cur_page < last_page; ++cur_page) { - mem->memory[mem->page_count++] = page_to_phys(*cur_page); - } - atipci_be->mem = mem; + atipci_be->pages = pages; + atipci_be->num_pages = num_pages; return 0; } @@ -292,12 +270,10 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, { ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); - - struct ati_pcigart_memory *mem = atipci_be->mem; off_t j; j = offset; - while (j < (offset + mem->page_count)) { + while (j < (offset + atipci_be->num_pages)) { j++; } @@ -323,17 +299,14 @@ static void ati_pcigart_clear_ttm(drm_ttm_backend_t *backend) { ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); - struct ati_pcigart_memory *mem = atipci_be->mem; DRM_DEBUG("\n"); - if (mem) { - unsigned long num_pages = mem->page_count; + if (atipci_be->pages) { backend->func->unbind(backend); - /* free test */ -// drm_free(mem, sizeof(struct ati_pcigart_memory), DRM_MEM_MAPPINGS); -// drm_free_memctl(num_pages * sizeof(void *)); + atipci_be->pages = NULL; + } - atipci_be->mem = NULL; + atipci_be->num_pages = 0; } static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) @@ -343,7 +316,7 @@ static void ati_pcigart_destroy_ttm(drm_ttm_backend_t *backend) DRM_DEBUG("\n"); atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); if (atipci_be) { - if (atipci_be->mem) { + if (atipci_be->pages) { backend->func->clear(backend); } drm_ctl_free(atipci_be, sizeof(*atipci_be), DRM_MEM_TTM); diff --git a/linux-core/drmP.h b/linux-core/drmP.h index ef9e133a..16e3f5b0 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -843,18 +843,13 @@ typedef struct drm_agp_ttm_backend { } drm_agp_ttm_backend_t; #endif -#define ATI_PCIGART_FLAG_VMALLOC 1 -struct ati_pcigart_memory { - size_t page_count; - unsigned long *memory; - int flags; -}; - typedef struct ati_pcigart_ttm_backend { drm_ttm_backend_t backend; int populated; struct ati_pcigart_info *gart_info; - struct ati_pcigart_memory *mem; + struct page **pages; + int num_pages; + int bound; } ati_pcigart_ttm_backend_t; static __inline__ int drm_core_check_feature(struct drm_device *dev, -- cgit v1.2.3 From 4294dcc050c5d2685f633e8a52deb925d806be85 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 12:26:06 +1000 Subject: complete PCIE backend for ttm ttm test runs with it at least, needs to do more testing on it --- linux-core/ati_pcigart.c | 68 +++++++++++++++++++++++++++++++++++++++++----- linux-core/drmP.h | 3 ++ linux-core/radeon_buffer.c | 3 +- shared-core/radeon_cp.c | 20 ++++++++++++++ shared-core/radeon_drv.h | 1 + 5 files changed, 86 insertions(+), 9 deletions(-) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index 44229a0d..91136060 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -51,6 +51,27 @@ static __inline__ void insert_page_into_table(struct ati_pcigart_info *info, u32 } } +static __inline__ u32 get_page_base_from_table(struct ati_pcigart_info *info, u32 *pci_gart) +{ + u32 retval; + switch(info->gart_reg_if) { + case DRM_ATI_GART_IGP: + retval = *pci_gart; + retval &= ~0xc; + break; + case DRM_ATI_GART_PCIE: + retval = *pci_gart; + retval &= ~0xc; + retval <<= 8; + break; + default: + case DRM_ATI_GART_PCI: + retval = *pci_gart; + break; + } + return retval; +} + static void *drm_ati_alloc_pcigart_table(int order) @@ -258,9 +279,10 @@ static int ati_pcigart_populate(drm_ttm_backend_t *backend, ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); - DRM_DEBUG("%d\n", num_pages); + DRM_ERROR("%ld\n", num_pages); atipci_be->pages = pages; atipci_be->num_pages = num_pages; + atipci_be->populated = 1; return 0; } @@ -271,28 +293,58 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); off_t j; + int i; + struct ati_pcigart_info *info = atipci_be->gart_info; + u32 *pci_gart; + u32 page_base; + pci_gart = info->addr; + DRM_ERROR("Offset is %08lX\n", offset); j = offset; while (j < (offset + atipci_be->num_pages)) { + if (get_page_base_from_table(info, pci_gart+j)) + return -EBUSY; j++; } -// for (i = 0, j = offset; i < mem->page_count; i++, j++) { + for (i = 0, j = offset; i < atipci_be->num_pages; i++, j++) { + struct page *cur_page = atipci_be->pages[i]; /* write value */ -// } + page_base = page_to_phys(cur_page); + insert_page_into_table(info, page_base, pci_gart + j); + } + + atipci_be->gart_flush_fn(atipci_be->dev); + atipci_be->bound = 1; + atipci_be->offset = offset; /* need to traverse table and add entries */ DRM_DEBUG("\n"); - return -1; + return 0; } static int ati_pcigart_unbind_ttm(drm_ttm_backend_t *backend) { ati_pcigart_ttm_backend_t *atipci_be = container_of(backend, ati_pcigart_ttm_backend_t, backend); - + struct ati_pcigart_info *info = atipci_be->gart_info; + unsigned long offset = atipci_be->offset; + int i; + off_t j; + u32 *pci_gart = info->addr; + DRM_DEBUG("\n"); - return -1; + + if (atipci_be->bound != 1) + return -EINVAL; + + for (i = 0, j = offset; i < atipci_be->num_pages; i++, j++) { + *(pci_gart + j) = 0; + } + atipci_be->gart_flush_fn(atipci_be->dev); + atipci_be->bound = 0; + atipci_be->offset = 0; + return 0; } static void ati_pcigart_clear_ttm(drm_ttm_backend_t *backend) @@ -334,7 +386,7 @@ static drm_ttm_backend_func_t ati_pcigart_ttm_backend = .destroy = ati_pcigart_destroy_ttm, }; -drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info) +drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev)) { ati_pcigart_ttm_backend_t *atipci_be; @@ -346,6 +398,8 @@ drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pciga atipci_be->backend.func = &ati_pcigart_ttm_backend; atipci_be->backend.mem_type = DRM_BO_MEM_TT; atipci_be->gart_info = info; + atipci_be->gart_flush_fn = gart_flush_fn; + atipci_be->dev = dev; return &atipci_be->backend; } diff --git a/linux-core/drmP.h b/linux-core/drmP.h index 16e3f5b0..5eb7c037 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -846,10 +846,13 @@ typedef struct drm_agp_ttm_backend { typedef struct ati_pcigart_ttm_backend { drm_ttm_backend_t backend; int populated; + void (*gart_flush_fn)(struct drm_device *dev); struct ati_pcigart_info *gart_info; + unsigned long offset; struct page **pages; int num_pages; int bound; + drm_device_t *dev; } ati_pcigart_ttm_backend_t; static __inline__ int drm_core_check_feature(struct drm_device *dev, diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index a90dae83..6f7a7603 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -33,7 +33,6 @@ #include "radeon_drm.h" #include "radeon_drv.h" - drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t * dev) { drm_radeon_private_t *dev_priv = dev->dev_private; @@ -41,7 +40,7 @@ drm_ttm_backend_t *radeon_create_ttm_backend_entry(drm_device_t * dev) if(dev_priv->flags & RADEON_IS_AGP) return drm_agp_init_ttm(dev); else - return ati_pcigart_init_ttm(dev, &dev_priv->gart_info); + return ati_pcigart_init_ttm(dev, &dev_priv->gart_info, radeon_gart_flush); } int radeon_fence_types(drm_buffer_object_t *bo, uint32_t * class, uint32_t * type) diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 56d17b9a..9dc871ca 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1384,6 +1384,26 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) } } + +void radeon_gart_flush(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + if (dev_priv->flags & RADEON_IS_IGPGART) { + RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH); + RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1); + RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH); + RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0); + } else if (dev_priv->flags & RADEON_IS_PCIE) { + + + } else { + + + } + +} + static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) { drm_radeon_private_t *dev_priv = dev->dev_private; diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index c16a43eb..5a33231a 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -344,6 +344,7 @@ extern int radeon_cp_resume(DRM_IOCTL_ARGS); extern int radeon_engine_reset(DRM_IOCTL_ARGS); extern int radeon_fullscreen(DRM_IOCTL_ARGS); extern int radeon_cp_buffers(DRM_IOCTL_ARGS); +extern void radeon_gart_flush(struct drm_device *dev); extern void radeon_freelist_reset(drm_device_t * dev); extern drm_buf_t *radeon_freelist_get(drm_device_t * dev); -- cgit v1.2.3 From f6e8023e03278731db38dcc0c429025f36817c65 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 12:26:18 +1000 Subject: take the lock earlier in ttmtest --- tests/ttmtest/src/ttmtest.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/ttmtest/src/ttmtest.c b/tests/ttmtest/src/ttmtest.c index 606fb0cb..052947b1 100644 --- a/tests/ttmtest/src/ttmtest.c +++ b/tests/ttmtest/src/ttmtest.c @@ -176,7 +176,7 @@ benchmarkBuffer(TinyDRIContext * ctx, unsigned long size, /* * Test system memory objects. */ - + BM_CKFATAL(drmGetLock(ctx->drmFD, ctx->hwContext, 0)); oldTime = fastrdtsc(); BM_CKFATAL(drmBOCreate(ctx->drmFD, 0, size, 0, NULL, drm_bo_type_dc, @@ -216,7 +216,7 @@ benchmarkBuffer(TinyDRIContext * ctx, unsigned long size, * Test TT bound buffer objects. */ - BM_CKFATAL(drmGetLock(ctx->drmFD, ctx->hwContext, 0)); + // BM_CKFATAL(drmGetLock(ctx->drmFD, ctx->hwContext, 0)); oldTime = fastrdtsc(); BM_CKFATAL(drmBOValidate(ctx->drmFD, &buf, DRM_BO_FLAG_MEM_TT, DRM_BO_MASK_MEM, DRM_BO_HINT_DONT_FENCE)); -- cgit v1.2.3 From c9dbe0f2c2248ef8c3ba5718f77922d1c7429e6f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 12:38:43 +1000 Subject: invalidate gart tlb on PCIE after table change --- shared-core/radeon_cp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 9dc871ca..2c0549e5 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1395,8 +1395,11 @@ void radeon_gart_flush(struct drm_device *dev) RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH); RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0); } else if (dev_priv->flags & RADEON_IS_PCIE) { - - + u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL); + tmp |= RADEON_PCIE_TX_GART_INVALIDATE_TLB; + RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); + tmp &= ~RADEON_PCIE_TX_GART_INVALIDATE_TLB; + RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); } else { -- cgit v1.2.3 From 96705ce6644389722f1605571e0a0dfde5568b8f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 18:23:05 +1000 Subject: add wbinvd calls --- linux-core/ati_pcigart.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c index 91136060..ebf19a2b 100644 --- a/linux-core/ati_pcigart.c +++ b/linux-core/ati_pcigart.c @@ -314,6 +314,12 @@ static int ati_pcigart_bind_ttm(drm_ttm_backend_t *backend, insert_page_into_table(info, page_base, pci_gart + j); } +#if defined(__i386__) || defined(__x86_64__) + wbinvd(); +#else + mb(); +#endif + atipci_be->gart_flush_fn(atipci_be->dev); atipci_be->bound = 1; -- cgit v1.2.3 From 03ce98aa2814dfd473c70487861aece79007a571 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 5 Jun 2007 18:23:24 +1000 Subject: set start to gart_vm_start at least --- linux-core/radeon_buffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 6f7a7603..159e87ea 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -101,7 +101,7 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP; man->drm_bus_maptype = _DRM_AGP; } else { - man->io_offset = 0; + man->io_offset = dev_priv->gart_vm_start; man->io_size = dev_priv->gart_size; man->io_addr = NULL; man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE; @@ -120,6 +120,7 @@ int radeon_move(drm_buffer_object_t * bo, { drm_bo_mem_reg_t *old_mem = &bo->mem; + DRM_DEBUG("\n"); if (old_mem->mem_type == DRM_BO_MEM_LOCAL) { return drm_bo_move_memcpy(bo, evict, no_wait, new_mem); } -- cgit v1.2.3 From abf35cbdcf5743c73929ddbe67ed4cae69b32aeb Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 7 Jun 2007 15:36:04 +1000 Subject: radeon: PCIGART memory is Can't map aperture as well there is one on the CPU.... with this my indirect buffers at least start to live.. (cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122) --- linux-core/radeon_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 159e87ea..67e6c585 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -104,7 +104,7 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, man->io_offset = dev_priv->gart_vm_start; man->io_size = dev_priv->gart_size; man->io_addr = NULL; - man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE; + man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CMA; man->drm_bus_maptype = _DRM_SCATTER_GATHER; } break; -- cgit v1.2.3 From 5c6a23704afa9445a58585ea2b8686b054f4074a Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 12 Jul 2007 14:25:29 +1000 Subject: Merge branch 'radeon-ttm' of git://people.freedesktop.org/~airlied/drm into radeon-ttm Conflicts: linux-core/ati_pcigart.c linux-core/drmP.h linux-core/radeon_buffer.c --- linux-core/drmP.h | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-core/drmP.h b/linux-core/drmP.h index 5eb7c037..4b54c244 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -1161,6 +1161,7 @@ extern int drm_sg_free(struct inode *inode, struct file *filp, /* ATI PCIGART support (ati_pcigart.h) */ extern int drm_ati_pcigart_init(drm_device_t * dev, drm_ati_pcigart_info *gart_info); extern int drm_ati_pcigart_cleanup(drm_device_t * dev, drm_ati_pcigart_info *gart_info); +extern drm_ttm_backend_t *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev)); extern drm_dma_handle_t *drm_pci_alloc(drm_device_t * dev, size_t size, size_t align, dma_addr_t maxaddr); -- cgit v1.2.3 From ead9cd64bd767a30235860e9cfca25d937784bee Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 12 Jul 2007 14:26:03 +1000 Subject: radeon: add VRAM support for radeon ttm This needs a lot of testing --- linux-core/radeon_buffer.c | 134 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 132 insertions(+), 2 deletions(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 67e6c585..611d0d6a 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -1,6 +1,6 @@ /************************************************************************** * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA + * Copyright 2007 Dave Airlie * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,7 +26,7 @@ * **************************************************************************/ /* - * Authors: Thomas Hellström + * Authors: Dave Airlie */ #include "drmP.h" @@ -87,6 +87,14 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, _DRM_FLAG_MEMTYPE_CACHED; man->drm_bus_maptype = 0; break; + case DRM_BO_MEM_VRAM: + man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | + _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP; + man->io_addr = NULL; + man->drm_bus_maptype = _DRM_FRAME_BUFFER; + man->io_offset = drm_get_resource_start(dev, 0); + man->io_size = drm_get_resource_len(dev, 0); + break; case DRM_BO_MEM_TT: if (dev_priv->flags & RADEON_IS_AGP) { if (!(drm_core_has_AGP(dev) && dev->agp)) { @@ -115,6 +123,122 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, return 0; } +static void radeon_emit_copy_blit(drm_device_t * dev, + uint32_t src_offset, + uint32_t dst_offset, + uint32_t pages, int direction) +{ + uint32_t cur_pages; + uint32_t stride = PAGE_SIZE; + drm_radeon_private_t *dev_priv = dev->dev_private; + uint32_t format, height; + RING_LOCALS; + + if (!dev_priv) + return; + + /* 32-bit copy format */ + format = RADEON_COLOR_FORMAT_ARGB8888; + + /* radeon limited to 16k stride */ + stride &= 0x3fff; + while(pages > 0) { + cur_pages = pages; + if (cur_pages > 2048) + cur_pages = 2048; + pages -= cur_pages; + + /* needs verification */ + BEGIN_RING(7); + OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5)); + OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | + RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_BRUSH_NONE | + (format << 8) | + RADEON_GMC_SRC_DATATYPE_COLOR | + RADEON_ROP3_S | + RADEON_DP_SRC_SOURCE_MEMORY | + RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); + if (direction) { + OUT_RING((stride << 22) | (src_offset >> 10)); + OUT_RING((stride << 22) | (dst_offset >> 10)); + } else { + OUT_RING((stride << 22) | (dst_offset >> 10)); + OUT_RING((stride << 22) | (src_offset >> 10)); + } + OUT_RING(0); + OUT_RING(pages); /* x - y */ + OUT_RING((stride << 16) | cur_pages); + ADVANCE_RING(); + } + + BEGIN_RING(2); + RADEON_WAIT_UNTIL_2D_IDLE(); + ADVANCE_RING(); + + return; +} + +static int radeon_move_blit(drm_buffer_object_t * bo, + int evict, int no_wait, drm_bo_mem_reg_t *new_mem) +{ + drm_bo_mem_reg_t *old_mem = &bo->mem; + int dir = 0; + + if ((old_mem->mem_type == new_mem->mem_type) && + (new_mem->mm_node->start < + old_mem->mm_node->start + old_mem->mm_node->size)) { + dir = 1; + } + + radeon_emit_copy_blit(bo->dev, + old_mem->mm_node->start << PAGE_SHIFT, + new_mem->mm_node->start << PAGE_SHIFT, + new_mem->num_pages, dir); + + + return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0, + DRM_FENCE_TYPE_EXE | + DRM_RADEON_FENCE_TYPE_RW, + DRM_RADEON_FENCE_FLAG_FLUSHED, new_mem); +} + +static int radeon_move_flip(drm_buffer_object_t * bo, + int evict, int no_wait, drm_bo_mem_reg_t * new_mem) +{ + drm_device_t *dev = bo->dev; + drm_bo_mem_reg_t tmp_mem; + int ret; + + tmp_mem = *new_mem; + tmp_mem.mm_node = NULL; + tmp_mem.mask = DRM_BO_FLAG_MEM_TT | + DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING; + + ret = drm_bo_mem_space(bo, &tmp_mem, no_wait); + if (ret) + return ret; + + ret = drm_bind_ttm(bo->ttm, 1, tmp_mem.mm_node->start); + if (ret) + goto out_cleanup; + + ret = radeon_move_blit(bo, 1, no_wait, &tmp_mem); + if (ret) + goto out_cleanup; + + ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem); +out_cleanup: + if (tmp_mem.mm_node) { + mutex_lock(&dev->struct_mutex); + if (tmp_mem.mm_node != bo->pinned_node) + drm_mm_put_block(tmp_mem.mm_node); + tmp_mem.mm_node = NULL; + mutex_unlock(&dev->struct_mutex); + } + return ret; +} + int radeon_move(drm_buffer_object_t * bo, int evict, int no_wait, drm_bo_mem_reg_t * new_mem) { @@ -123,6 +247,12 @@ int radeon_move(drm_buffer_object_t * bo, DRM_DEBUG("\n"); if (old_mem->mem_type == DRM_BO_MEM_LOCAL) { return drm_bo_move_memcpy(bo, evict, no_wait, new_mem); + } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) { + if (radeon_move_flip(bo, evict, no_wait, new_mem)) + return drm_bo_move_memcpy(bo, evict, no_wait, new_mem); + } else { + if (radeon_move_blit(bo, evict, no_wait, new_mem)) + return drm_bo_move_memcpy(bo, evict, no_wait, new_mem); } return 0; } -- cgit v1.2.3 From 0be629a914129446b353881f7d92aae707137047 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 16 Jul 2007 14:45:47 +1000 Subject: drm/radeon/ttm: more VRAM fixes --- linux-core/radeon_buffer.c | 8 ++++++-- linux-core/radeon_drv.c | 4 ++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 611d0d6a..5b10c24a 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -71,6 +71,11 @@ uint32_t radeon_evict_mask(drm_buffer_object_t *bo) case DRM_BO_MEM_LOCAL: case DRM_BO_MEM_TT: return DRM_BO_FLAG_MEM_LOCAL; + case DRM_BO_MEM_VRAM: + if (bo->mem.num_pages > 128) + return DRM_BO_MEM_TT; + else + return DRM_BO_MEM_LOCAL; default: return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED; } @@ -88,8 +93,7 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, man->drm_bus_maptype = 0; break; case DRM_BO_MEM_VRAM: - man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | - _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP; + man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP; man->io_addr = NULL; man->drm_bus_maptype = _DRM_FRAME_BUFFER; man->io_offset = drm_get_resource_start(dev, 0); diff --git a/linux-core/radeon_drv.c b/linux-core/radeon_drv.c index d0995b5b..079971d5 100644 --- a/linux-core/radeon_drv.c +++ b/linux-core/radeon_drv.c @@ -71,8 +71,8 @@ static drm_fence_driver_t radeon_fence_driver = { #endif #ifdef RADEON_HAVE_BUFFER -static uint32_t radeon_mem_prios[] = {DRM_BO_MEM_PRIV0, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL}; -static uint32_t radeon_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_PRIV0, DRM_BO_MEM_LOCAL}; +static uint32_t radeon_mem_prios[] = {DRM_BO_MEM_VRAM, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL}; +static uint32_t radeon_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_VRAM, DRM_BO_MEM_LOCAL}; static drm_bo_driver_t radeon_bo_driver = { .mem_type_prio = radeon_mem_prios, -- cgit v1.2.3 From 89d44a1023543a95b429bf72662b5e2308b0a550 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 7 Oct 2007 08:16:38 +1000 Subject: radeon: make vram fixed type --- linux-core/radeon_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-core/radeon_buffer.c b/linux-core/radeon_buffer.c index 5b10c24a..3afc17ee 100644 --- a/linux-core/radeon_buffer.c +++ b/linux-core/radeon_buffer.c @@ -93,7 +93,7 @@ int radeon_init_mem_type(drm_device_t * dev, uint32_t type, man->drm_bus_maptype = 0; break; case DRM_BO_MEM_VRAM: - man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP; + man->flags = _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP; man->io_addr = NULL; man->drm_bus_maptype = _DRM_FRAME_BUFFER; man->io_offset = drm_get_resource_start(dev, 0); -- cgit v1.2.3