From 853429b939c792c4bc0bc91fdef696e3251b88d9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <maraeo@gmail.com>
Date: Mon, 20 Aug 2012 17:15:15 +0200
Subject: radeon: align r600 msaa buffers to a multiple of macrotile size * num
 samples

I am not sure whether this is needed, but better be safe than sorry.
---
 radeon/radeon_surface.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 98f4aaf5..4118a37f 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -356,7 +356,7 @@ static int r6_surface_init_2d(struct radeon_surface_manager *surf_man,
         surf->bo_alignment =
             MAX2(surf_man->hw_info.num_pipes *
                  surf_man->hw_info.num_banks *
-                 surf->bpe * 64,
+                 surf->nsamples * surf->bpe * 64,
                  xalign * yalign * surf->nsamples * surf->bpe);
     }
 
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