From 3306abbde7565596528e863d2cf906a4a49f3271 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sat, 10 Apr 2004 13:52:43 +0000 Subject: white space changes to align with kernel --- shared-core/r128_drm.h | 36 ++++++++++++++++++------------------ shared-core/r128_state.c | 2 +- shared-core/radeon_drm.h | 2 +- shared/r128_drm.h | 36 ++++++++++++++++++------------------ shared/r128_state.c | 2 +- shared/radeon_drm.h | 2 +- 6 files changed, 40 insertions(+), 40 deletions(-) diff --git a/shared-core/r128_drm.h b/shared-core/r128_drm.h index 7d5258d4..ae51de34 100644 --- a/shared-core/r128_drm.h +++ b/shared-core/r128_drm.h @@ -217,25 +217,25 @@ typedef struct drm_r128_sarea { #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) #define DRM_IOCTL_R128_GETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; + +typedef struct drm_r128_init { + enum { + R128_INIT_CCE = 0x01, + R128_CLEANUP_CCE = 0x02 + } func; #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int sarea_priv_offset; -#else - unsigned long sarea_priv_offset; -#endif - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; + int sarea_priv_offset; +#else + unsigned long sarea_priv_offset; +#endif + int is_pci; + int cce_mode; + int cce_secure; + int ring_size; + int usec_timeout; + + unsigned int fb_bpp; + unsigned int front_offset, front_pitch; unsigned int back_offset, back_pitch; unsigned int depth_bpp; unsigned int depth_offset, depth_pitch; diff --git a/shared-core/r128_state.c b/shared-core/r128_state.c index dcacb0f3..81d22099 100644 --- a/shared-core/r128_state.c +++ b/shared-core/r128_state.c @@ -915,7 +915,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev, DRM_DEBUG( "\n" ); count = depth->n; - if (count>4096 || count<=0) + if (count > 4096 || count <= 0) return -EMSGSIZE; if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) { diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h index b2cc5848..c60c09fd 100644 --- a/shared-core/radeon_drm.h +++ b/shared-core/radeon_drm.h @@ -424,7 +424,7 @@ typedef struct { #define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t) #define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) #define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t) - + typedef struct drm_radeon_init { enum { RADEON_INIT_CP = 0x01, diff --git a/shared/r128_drm.h b/shared/r128_drm.h index 7d5258d4..ae51de34 100644 --- a/shared/r128_drm.h +++ b/shared/r128_drm.h @@ -217,25 +217,25 @@ typedef struct drm_r128_sarea { #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) #define DRM_IOCTL_R128_GETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; + +typedef struct drm_r128_init { + enum { + R128_INIT_CCE = 0x01, + R128_CLEANUP_CCE = 0x02 + } func; #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int sarea_priv_offset; -#else - unsigned long sarea_priv_offset; -#endif - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; + int sarea_priv_offset; +#else + unsigned long sarea_priv_offset; +#endif + int is_pci; + int cce_mode; + int cce_secure; + int ring_size; + int usec_timeout; + + unsigned int fb_bpp; + unsigned int front_offset, front_pitch; unsigned int back_offset, back_pitch; unsigned int depth_bpp; unsigned int depth_offset, depth_pitch; diff --git a/shared/r128_state.c b/shared/r128_state.c index dcacb0f3..81d22099 100644 --- a/shared/r128_state.c +++ b/shared/r128_state.c @@ -915,7 +915,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev, DRM_DEBUG( "\n" ); count = depth->n; - if (count>4096 || count<=0) + if (count > 4096 || count <= 0) return -EMSGSIZE; if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) { diff --git a/shared/radeon_drm.h b/shared/radeon_drm.h index b2cc5848..c60c09fd 100644 --- a/shared/radeon_drm.h +++ b/shared/radeon_drm.h @@ -424,7 +424,7 @@ typedef struct { #define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t) #define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) #define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t) - + typedef struct drm_radeon_init { enum { RADEON_INIT_CP = 0x01, -- cgit v1.2.3