From 0184bb1c6d946bcaf198f7680b3405adca676790 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sun, 19 Dec 2010 13:01:15 +0000 Subject: intel: Export CONSTANT_BUFFER addressing mode Signed-off-by: Chris Wilson --- include/drm/i915_drm.h | 13 +++++++++++++ intel/intel_bufmgr.c | 4 ++-- intel/intel_bufmgr.h | 2 +- intel/intel_bufmgr_gem.c | 6 +++--- intel/intel_bufmgr_priv.h | 4 ++-- 5 files changed, 21 insertions(+), 8 deletions(-) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 19da2c04..98e15978 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -279,6 +279,8 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_BSD 10 #define I915_PARAM_HAS_BLT 11 #define I915_PARAM_HAS_RELAXED_FENCING 12 +#define I915_PARAM_HAS_COHERENT_RINGS 13 +#define I915_PARAM_HAS_EXEC_CONSTANTS 14 typedef struct drm_i915_getparam { int param; @@ -625,6 +627,17 @@ struct drm_i915_gem_execbuffer2 { #define I915_EXEC_RENDER (1<<0) #define I915_EXEC_BSD (2<<0) #define I915_EXEC_BLT (3<<0) + +/* Used for switching the constants addressing mode on gen4+ RENDER ring. + * Gen6+ only supports relative addressing to dynamic state (default) and + * absolute addressing. + * + * These flags are ignored for the BSD and BLT rings. + */ +#define I915_EXEC_CONSTANTS_MASK (3<<6) +#define I915_EXEC_CONSTANTS_REL_GENERAL (0<<6) /* default */ +#define I915_EXEC_CONSTANTS_ABSOLUTE (1<<6) +#define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */ __u64 flags; __u64 rsvd1; __u64 rsvd2; diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c index f93a8707..b7c5c091 100644 --- a/intel/intel_bufmgr.c +++ b/intel/intel_bufmgr.c @@ -136,12 +136,12 @@ drm_intel_bo_exec(drm_intel_bo *bo, int used, int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, drm_clip_rect_t *cliprects, int num_cliprects, int DR4, - int ring_flag) + unsigned int rings) { if (bo->bufmgr->bo_mrb_exec) return bo->bufmgr->bo_mrb_exec(bo, used, cliprects, num_cliprects, DR4, - ring_flag); + rings); return -ENODEV; } diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index e1b4c454..daa18b4c 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -114,7 +114,7 @@ int drm_intel_bo_exec(drm_intel_bo *bo, int used, struct drm_clip_rect *cliprects, int num_cliprects, int DR4); int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, struct drm_clip_rect *cliprects, int num_cliprects, int DR4, - int ring_flag); + unsigned int flags); int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count); int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index c5bb5885..72c8731f 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -1555,13 +1555,13 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used, static int drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, drm_clip_rect_t *cliprects, int num_cliprects, int DR4, - int ring_flag) + unsigned int flags) { drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; struct drm_i915_gem_execbuffer2 execbuf; int ret, i; - switch (ring_flag) { + switch (flags & 0x7) { default: return -EINVAL; case I915_EXEC_BLT: @@ -1594,7 +1594,7 @@ drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, execbuf.num_cliprects = num_cliprects; execbuf.DR1 = 0; execbuf.DR4 = DR4; - execbuf.flags = ring_flag; + execbuf.flags = flags; execbuf.rsvd1 = 0; execbuf.rsvd2 = 0; diff --git a/intel/intel_bufmgr_priv.h b/intel/intel_bufmgr_priv.h index 87e91e7f..0b625200 100644 --- a/intel/intel_bufmgr_priv.h +++ b/intel/intel_bufmgr_priv.h @@ -177,8 +177,8 @@ struct _drm_intel_bufmgr { * ring buffer */ int (*bo_mrb_exec) (drm_intel_bo *bo, int used, - drm_clip_rect_t *cliprects, int num_cliprects, - int DR4, int ring_flag); + drm_clip_rect_t *cliprects, int num_cliprects, + int DR4, unsigned flags); /** * Pin a buffer to the aperture and fix the offset until unpinned -- cgit v1.2.3