| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-05-23 | drm: fix nouveau warning | Dave Airlie | |
| 2008-05-22 | i915: init bo mm at driver init only when modeset=1 | Hong Liu | |
| To avoid bo memory manager being inited twice, it will be called at firstopen when modeset is not enabled. | |||
| 2008-05-21 | [gem] Replace ring throttling hack with actual time measurement. | Eric Anholt | |
| 2008-05-21 | rs690/r500: vblank support. | Dave Airlie | |
| The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips | |||
| 2008-05-20 | [gem] Use a separate sequence number field from classic/ttm | Eric Anholt | |
| This lets us get some qualities we desire, such as using the full 32-bit range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active sequence numbers to request structs, which will be used soon for throttling and interrupt-driven list cleanup. | |||
| 2008-05-20 | [gem] Rename sequence numbers from "cookie" to "seqno" | Eric Anholt | |
| 2008-05-20 | [gem] Clean up active/inactive list handling using helper functions. | Eric Anholt | |
| Additionally, a boolean active field is added to indicate which list an object is on, rather than smashing last_rendering_cookie to 0 to show inactive. This will help with flush-reduction later on, and makes the code clearer. | |||
| 2008-05-17 | r500: add more register ranges for Mesa driver | Dave Airlie | |
| 2008-05-15 | [gem] Hold dev->struct_mutex to protect structure data. | Eric Anholt | |
| 2008-05-15 | [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). | Eric Anholt | |
| 2008-05-13 | RS4xx: separate out RS400 and RS480 IGP chips | Alex Deucher | |
| RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480. | |||
| 2008-05-13 | Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm ↵ | Jesse Barnes | |
| into modesetting-101 | |||
| 2008-05-13 | i915: register definition & header file cleanup | Jesse Barnes | |
| It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file. | |||
| 2008-05-13 | i915: execbuf now works without i915_dma_init being called | Jakob Bornecrantz | |
| 2008-05-12 | i915: TV hotplug fixes | Jesse Barnes | |
| In order to avoid recursive ->detect->interrupt->detect->interrupt->... we need to disable TV hotplug interrupts in intel_tv.c:intel_tv_detect_type. We also need to enable the TV interrupt detection and hotplug sequence properly in i915_irq.c. | |||
| 2008-05-12 | [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. | Eric Anholt | |
| 2008-05-12 | [intel] When polling for ring space, sleep for a lot longer (10ms) | Keith Packard | |
| If the ring is full, the engine will surely be running for more than 10ms. | |||
| 2008-05-12 | fix kernel oops when removing fb | Hong Liu | |
| drm_crtc->fb may point to NULL, f.e X server will allocate a new fb and assign it to the CRTC at startup, when X server exits, it will destroy the allocated fb, making drm_crtc->fb points to NULL. | |||
| 2008-05-12 | modeset init code cleanup | Hong Liu | |
| moving modeset init code into one function and correct error handling druing i915 init | |||
| 2008-05-12 | fix G33 hardware status page in modeset | Hong Liu | |
| We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D driver can't alloc gfx memory when working in drm modeset. | |||
| 2008-05-12 | RADEON: fix copy/pasto in last commit | Alex Deucher | |
| 2008-05-12 | R3/4/5: init pipe setup in drm | Alex Deucher | |
| Similar (broken) code in mesa needs to be removed | |||
| 2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
| 2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
| 2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
| 2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
| 2008-05-12 | R300+: fixup PURGE/FLUSH macros | Alex Deucher | |
| 2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
| 2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
| first step in merging rs4xx/rs6xx gart setup | |||
| 2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
| 2008-05-12 | drm: remove root only from a lot of drm ioctls to get stuff running as non-root | Dave Airlie | |
| 2008-05-11 | [GEM] Make pread/pwrite manage memory domains. No luck with movnti though. | Keith Packard | |
| pread and pwrite must update the memory domains to ensure consistency with the GPU. At some point, it should be possible to avoid clflush through this path, but that isn't working for me. | |||
| 2008-05-10 | Merge commit 'anholt/drm-gem' into drm-gem | Keith Packard | |
| 2008-05-10 | [intel-GEM] Clean up GEM ioctl naming. | Keith Packard | |
| Rename 'validate_entry' to 'exec_object', then clean up some field names in structures (renaming buffer_offset to just offset, for example). | |||
| 2008-05-09 | GEM: Separate the LRU into execution list and LRU list. | Eric Anholt | |
| Now, the LRU list has objects that are completely done rendering and ready to kick out, while the execution list has things with active rendering, which have associated cookies and reference counts on them. | |||
| 2008-05-09 | fixup i915 workqueue handling when modeset=1 | Hong Liu | |
| Fixup workqueue creation error handling and make sure we destroy the queue on unload. | |||
| 2008-05-09 | i915: add basic VBT support | Jesse Barnes | |
| Map the VBIOS (and therefore VBT) at init time for use by various output initialization routines. | |||
| 2008-05-09 | [gem] API cleanup. allocate->create unreference->close name->flink | Keith Packard | |
| Make the API names a bit more consistent. | |||
| 2008-05-08 | i915: Changed intel_fb to use the new drm_crtc_set_config interface | Jakob Bornecrantz | |
| 2008-05-08 | [intel-gem] Move domains to relocation records. add set_domain ioctl. | Keith Packard | |
| Domain information is about buffer relationships, not buffer contents. That means a relocation contains the domain information as it knows how the source buffer references the target buffer. This also adds the set_domain ioctl so that user space can move buffers to the cpu domain. | |||
| 2008-05-08 | Revert "i915: fix vbl swap for multi-master" | Dave Airlie | |
| This reverts commit 2a78ad22647933aa8842d534bce6495ff93fbf76. | |||
| 2008-05-08 | i915: fix vbl swap for multi-master | Dave Airlie | |
| patch from F9 tree | |||
| 2008-05-08 | drm_mode: initial replacefb implemenation | Dave Airlie | |
| 2008-05-08 | Merge remote branch 'origin/master' into modesetting-101 | Dave Airlie | |
| Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h | |||
| 2008-05-07 | GEM: Extend cache domain stuff for 965. | Eric Anholt | |
| One of our MI_FLUSH bits is reserved on 965, being always implied, and there's a vertex cache that was forgotten. | |||
| 2008-05-06 | [intel-GEM] ref count objects in gtt-lru. | Keith Packard | |
| If objects on the lru aren't ref counted, they'll get pulled from the gtt as soon as they are freed. This change does cause objects to get stuck in the gtt until they're forced out by new requests. The lru should get cleaned when the irq occurs. | |||
| 2008-05-06 | Merge commit 'anholt/drm-gem' into drm-gem | Keith Packard | |
| 2008-05-06 | Start coding up memory domains | Keith Packard | |
| 2008-05-06 | GEM: Use irq-based fencing rather than syncing and evicting every exec. | Eric Anholt | |
| 2008-05-05 | Dump last batch buffer when hardware lockup is detected. | Keith Packard | |
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core