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2007-11-27r500: add a bunch of all r5xx pci ids..Dave Airlie
fix up a range that may be needed for r500 mesa
2007-11-22drm: major whitespace/coding style realignment with kernelDave Airlie
2007-11-22i915: add context handle to superioctl structDave Airlie
This will be used later for lockless operation.
2007-11-22r500: add pci id for X1650Dave Airlie
2007-11-21r500: suggestion from glisse to not add cliprect offset on r5xxDave Airlie
2007-11-20radeon: add initial r5xx supportDave Airlie
2007-11-19Fix capitalization of __linux__ define.Eric Anholt
2007-11-18Bug #13233: Fix build on FreeBSD.Robert Noland
2007-11-18radeon: refactor out the fb/agp location read/write.Dave Airlie
Add a new get param to get the fb location into userspace. Mesa currently hits MMIO to do this, but this isn't always possible.
2007-11-16nouveau: also mention the number of succcessfully copied bios bytes.Stephane Marchesin
2007-11-15nouveau: be verbose about PPC bios for now.Stephane Marchesin
2007-11-15nouveau: revert the nv34 context size change, it was not the culprit after all.Stephane Marchesin
2007-11-15nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels.Stephane Marchesin
2007-11-15nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output ↵Stephane Marchesin
detection in user space.
2007-11-15intel: add flushing for i8xx chipsets.Dave Airlie
Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM code paths
2007-11-14nouveau: nv30: missing ramin init, does it brake other hw?Patrice Mandin
2007-11-14Add new shared header file drm_internal.h.Kristian Høgsberg
This header file is shared across linux and bsd, but is not installed for user space to access. It's the place to put prototypes and data types that aren't platform or chipset specific, but still internal to the drm.
2007-11-14nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards.Stephane Marchesin
2007-11-14nouveau: Also wait until CACHE1 gets emptied.Ben Skeggs
2007-11-14Revert "nouveau: stub superioctl"Ben Skeggs
This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed. Err.. didn't mean for that to slip in :)
2007-11-14Merge branch 'fifo-cleanup' into upstream-masterBen Skeggs
2007-11-14nouveau: Attempt to wait for channel idle before we destroy it.Ben Skeggs
2007-11-14nouveau: Use "new" NV40 USER control regs.Ben Skeggs
Probably entirely pointless, but a simple change in any case.
2007-11-14nouveau: store user control reg offsets in channel structBen Skeggs
2007-11-14nouveau: funcs to determine active channel on PFIFO.Ben Skeggs
2007-11-14nouveau: stub superioctlBen Skeggs
2007-11-07i915: oops disable TTM is backwardsDave Airlie
2007-11-06i915: disable TTM on 8xx chips for now until flushing is solvedDave Airlie
2007-11-06[PATCH] i915: fix missing G33 detect in IS_I9XXZhenyu Wang
G33 detect seems missing with Jesse's suspend/resume patch.
2007-11-06i915: cleanup most of the whitespaceDave Airlie
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-11-04nouveau: more nv20_graph_init.Pekka Paalanen
This patch is originally from malc0_, but since it used some NV40_* regs, I edited them into hex values with a comment. This seems to correspond quite well with my own mmio-trace, for the parts I cared to check.
2007-11-05nouveau: Use a sw method instead of notify interrupt to signal fence completion.Ben Skeggs
2007-11-05nouveau: cleanupsBen Skeggs
2007-11-05nouveau: only pass annoying messages if irq isn't handled fully.Ben Skeggs
2007-11-05nouveau: hook up an inital fence irq handlerBen Skeggs
2007-11-05nouveau: crappy ttm mm init, disabled for now.Ben Skeggs
2007-11-02nouveau: put it all together.Jeremy Kolb
2007-11-03radeon: set the address to access the aperture on the CPU side correctlyDave Airlie
This code relied on the CPU and GPU address for the aperture being the same, On some r5xx hardware I was playing with I noticed that this isn't always true. I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-01Use unsigned long instead of u64 in drm_modeset_ctl_tJesse Barnes
A bad idea, ABI-wise, but we're going to be changing this structure anyway before we merge upstream, so just fix the build for now.
2007-11-01nouveau: don't use AGP on PPC. It's a hopeless case.Stephane Marchesin
2007-10-31Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drmJeremy Kolb
2007-10-31nouveau: ttm stubsJeremy Kolb
2007-11-01drm/ttm: add support for cached un-snooped mappings.Dave Airlie
This mapping allows cached objects to be mapped in/out of the TT space with the appropriate flushing calls. It should put back the old CACHED functionality for snooped mappings
2007-10-31drm: add chipset flushing via agp supportDave Airlie
2007-10-31i915: add backwards compat chipset flushing codeDave Airlie
2007-10-30Merge branch 'master' into vblank-rework, fixup remaining driversJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_irq.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_drv.h shared-core/mga_irq.c shared-core/radeon_drv.h shared-core/radeon_irq.c Merge in the latest master bits and update the remaining drivers (except mach64 which math_b is working on). Also remove the 9xx hack from the i915 driver; it seems to be correct.
2007-10-30Nouveau: add a comment about SKIPS for next API breakage.Stephane Marchesin
2007-10-30Nouveau: fold some loops.Stephane Marchesin
2007-10-30drm/i915: add driver cache flush entry pointDave Airlie
Use clflush on Intel hardware to flush cached objects.
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