renesas/drm.git - libdrm, cloned from git://anongit.freedesktop.org/mesa/drm

Age	Commit message (Collapse)	Author
2008-06-09	r300/r500: add hier-z regs	Dave Airlie

2008-06-06	[intel] remove settable use_mi_batchbuffer_start	Keith Packard
	The driver can know what hardware requires MI_BATCH_BUFFER vs MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06	[intel-gem] Use timers to retire requests periodically.	Keith Packard
	Without the user IRQ running constantly, there's no wakeup when the ring empties to go retire requests and free buffers. Use a 1 second timer to make that happen more often.
2008-06-06	[intel] free the hardware status page at driver_unload	Keith Packard
	This goes with the other hardware status page patch.
2008-06-06	[intel-gem] Add explicit throttle ioctl	Keith Packard
	Instead of throttling and execbuffer time, have the application ask to throttle explicitly. This allows the throttle to happen less often, and without holding the DRM lock.
2008-06-06	[intel] Allocate hardware status page at driver load time	Keith Packard
	I couldn't get the re-allocated HWS to work on my 965GM, so I just gave up and made it persist across the lifetime of the driver instead.
2008-06-06	Ignore X server provided mmio address	Keith Packard

2008-06-05	radeon: Restore software interrupt on resume.	Dennis Kasprzyk
	Fixes performance drop after suspend/resume on some systems.
2008-06-03	drm: sg alloc should write back the handle to userspace	Dave Airlie

2008-05-30	RADEON: fix typo in last commit	Alex Deucher

2008-05-30	Merge commit 'origin/master' into drm-gem	Eric Anholt
	Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h shared-core/nouveau_state.c
2008-05-30	r500: attempt to make AGP work by programming agp base in the MC correctly	Dave Airlie

2008-05-28	radeon: split microcode out into a separate header file.	Dave Airlie

2008-05-27	[intel-gem] Replace idlelock usage with real lock acquisition.	Eric Anholt

2008-05-28	i915: fix BSD bh, DRI2 not uses anywhere else	Dave Airlie

2008-05-28	radeon: bump release date/version for r500 3D support	Dave Airlie

2008-05-27	RADEON: add get_param for number of GB pipes	Alex Deucher

2008-05-27	[i915] Fix typo in (unused) START_ADDR definition.	Jie Luo

2008-05-27	[FreeBSD] Add vblank-rework support and get drivers building.	Robert Noland
	The i915 driver now works again.
2008-05-26	[i915] leave interrupts masked off when not in use.	Keith Packard
	The interrupt enable register cannot be used to temporarily disable interrupts, instead use the interrupt mask register. Note that this change means that a pile of buffers will be left stuck on the chip as the final interrupts will not be recognized to come and drain things.
2008-05-25	[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.	Keith Packard
	This new ioctl returns whether re-using the buffer would force a wait.
2008-05-22	[intel] Add debug code to verify the cached ring tail pointer.	Keith Packard
	Recording the tail pointer in a local variable improves performance, but if someone messes up and fails to reload at the right time, the driver will write commands to the wrong part of the ring and scramble execution badly. This change (available by setting I915_RING_VALIDATE to 1) checks to make sure the cached tail pointer matches the hardware tail pointer at each ring buffer addition, calling BUG_ON when that's not true.
2008-05-22	[gem] Release GEM buffers from work task scheduled from IRQ.	Eric Anholt
	There are now 3 lists. Active is buffers currently in the ringbuffer. Flushing is not in the ringbuffer, but needs a flush before unbinding. Inactive is as before. This prevents object_free → unbind → wait_rendering → object_reference and a kernel oops about weird refcounting. This also avoids an synchronous extra flush and wait when freeing a buffer which had a write_domain set (such as a temporary rendered to and then from using the 2d engine). It will sit around on the flushing list until the appropriate flush gets emitted, or we need the GTT space for another operation.
2008-05-23	r500: add two more register ranges for mesa driver to setup	Dave Airlie

2008-05-23	drm: fix nouveau warning	Dave Airlie

2008-05-21	[gem] Replace ring throttling hack with actual time measurement.	Eric Anholt

2008-05-21	rs690/r500: vblank support.	Dave Airlie
	The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips
2008-05-20	[gem] Use a separate sequence number field from classic/ttm	Eric Anholt
	This lets us get some qualities we desire, such as using the full 32-bit range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active sequence numbers to request structs, which will be used soon for throttling and interrupt-driven list cleanup.
2008-05-20	[gem] Rename sequence numbers from "cookie" to "seqno"	Eric Anholt

2008-05-20	[gem] Clean up active/inactive list handling using helper functions.	Eric Anholt
	Additionally, a boolean active field is added to indicate which list an object is on, rather than smashing last_rendering_cookie to 0 to show inactive. This will help with flush-reduction later on, and makes the code clearer.
2008-05-17	r500: add more register ranges for Mesa driver	Dave Airlie

2008-05-15	[gem] Hold dev->struct_mutex to protect structure data.	Eric Anholt

2008-05-15	[gem] Rename the GTT LRU lists to active (executing) and inactive (idle).	Eric Anholt

2008-05-13	RS4xx: separate out RS400 and RS480 IGP chips	Alex Deucher
	RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480.
2008-05-12	[GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen.	Eric Anholt

2008-05-12	[intel] When polling for ring space, sleep for a lot longer (10ms)	Keith Packard
	If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12	RADEON: fix copy/pasto in last commit	Alex Deucher

2008-05-12	R3/4/5: init pipe setup in drm	Alex Deucher
	Similar (broken) code in mesa needs to be removed
2008-05-12	RADEON: cleanup radeon_do_engine_reset()	Alex Deucher

2008-05-12	R300+: fixup pixcache flush	Alex Deucher

2008-05-12	RS4xx: fix MCIND index mask	Alex Deucher

2008-05-12	RADEON: write AGP_BASE_2 on chips that support it	Alex Deucher

2008-05-12	R300+: fixup PURGE/FLUSH macros	Alex Deucher

2008-05-12	Radeon IGP: merge RS4xx/RS6xx gart setup	Alex Deucher

2008-05-12	Radeon IGP: wrap MCIND access	Alex Deucher
	first step in merging rs4xx/rs6xx gart setup
2008-05-12	Radeon IGP: clean up registers and magic numbers	Alex Deucher

2008-05-11	[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.	Keith Packard
	pread and pwrite must update the memory domains to ensure consistency with the GPU. At some point, it should be possible to avoid clflush through this path, but that isn't working for me.
2008-05-10	Merge commit 'anholt/drm-gem' into drm-gem	Keith Packard

2008-05-10	[intel-GEM] Clean up GEM ioctl naming.	Keith Packard
	Rename 'validate_entry' to 'exec_object', then clean up some field names in structures (renaming buffer_offset to just offset, for example).
2008-05-09	GEM: Separate the LRU into execution list and LRU list.	Eric Anholt
	Now, the LRU list has objects that are completely done rendering and ready to kick out, while the execution list has things with active rendering, which have associated cookies and reference counts on them.