summaryrefslogtreecommitdiff
path: root/shared-core
AgeCommit message (Collapse)Author
2008-08-31radeon: make writeback work after suspend/resume.Dave Airlie
While re-writing this for modesetting, I find we disable writeback on resume.
2008-08-29[FreeBSD] Replace typedefs on bsd.vehemens
Signed-off-by: Robert Noland <rnoland@2hip.net>
2008-08-24i915: Fix i915 build on FreeBSDRobert Noland
ifdef out all the gem stuff for now. Also, the msi stuff isn't portable the way it is... I'll try and fix that up sometime soon.
2008-08-24i915: Convert vblank on disabled pipe DRM_ERROR to DRM_DEBUG.Robert Noland
2008-08-24i915: Clear sarea_priv during lastclose.Robert Noland
sarea_priv needs to be NULL before i915_initialized is called to properly reset it. The stale value produces a panic any time something opens/closes drm without calling initialize. i.e. version checking
2008-08-24i915: Free dev->dev_private on unload.Robert Noland
2008-08-24i915: Move spinlock init / destroy to load / unload time.Robert Noland
This resolves the panic on FreeBSD during VT switch, without attempting any of the more lofty goals for the time being.
2008-08-19nouveau: fifo and graphics engine suspend and resume for nv04-nv4xroot
Corresponding DDX patch at http://people.freedesktop.org/~stuart/nv0x-nv4x_suspend/
2008-08-17nouveau: make it compile under 2.6.27Maarten Maathuis
2008-08-08Merge branch 'drm-gem'Eric Anholt
Conflicts: shared-core/i915_dma.c This brings in kernel support and userland interface for intel GEM.
2008-08-08nouveau: wait for pgraph idle after loading or saving a contextStuart Bennett
the nvidia driver does this, and it stops the error message appearing on nv40
2008-08-01Revert "i915: Move all of the irq install/uninstall to load time."Dave Airlie
This reverts commit 965a72202b439068e62ac341990f51953457b202. Please re-do over properly
2008-07-30intel-gem: Replace version bump signalling GEM with I915_PARAM_HAS_GEM.Eric Anholt
2008-07-30Revert "Rename drm_mm.c and its fuctions to drm_memrange."Eric Anholt
This reverts commit 3ad8db2071d30c198403e605f2726fc5c3e46bfd. We ended up not needing that namespace, and I'd rather not have the churn for producing diffs.
2008-07-30i915: more version checksDave Airlie
2008-07-30i915: add version checks for opregion on old kernelsDave Airlie
2008-07-29r300: Fix cliprect emitNicolai Haehnle
This makes our handling of cliprects sane. drm_clip_rect always has exclusive bottom-right corners, but the hardware expects inclusive bottom-right corners, so we adjust this here. This complements Michel Daenzer's commit 57aea290e1e0a26d1e74df6cff777eb9f038f1f8 to Mesa. See also http://bugs.freedesktop.org/show_bug.cgi?id=16123 .
2008-07-28intel: Fix typo in unused register definition name.Eric Anholt
2008-07-28Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-07-29nouveau: fix nv04 fifo context save to save reg contents, not reg offsetStuart Bennett
clearly the function had never been used :)
2008-07-29nouveau: fix bad rename from 5a072f32c8f941d1ef301811881e8c89c8d8a5f1Stuart Bennett
2008-07-28intel-gem: Another checkpatch.pl pass.Eric Anholt
2008-07-28intel-gem: Speed up tiled readpixels by tracking which pages have been flushed.Eric Anholt
This is around 3x or so speedup, since we would read wide rows at a time, and clflush each tile 8 times as a result. We'll want code related to this anyway when we do fault-based per-page clflushing for sw fallbacks.
2008-07-26intel-gem: Move debug-only functions to a separate file.Eric Anholt
2008-07-26r300_cmdbuf: Always emit INDX_BUFFER immediately after DRAW_INDEXNicolai Haehnle
DRAW_INDEX writes a vertex count to VAP_VF_CNTL. Docs say that behaviour is undefined (i.e. lockups happen) when this write is not followed by the right number of vertex indices. Thus we used to do the wrong thing when drawing across many cliprects was necessary, because we emitted a sequence DRAW_INDEX, DRAW_INDEX, INDX_BUFFER, INDX_BUFFER instead of DRAW_INDEX, INDX_BUFFER, DRAW_INDEX, INDX_BUFFER The latter is what we're doing now and which ought to be correct.
2008-07-23i915: Move all of the irq install/uninstall to load time.Robert Noland
This resolves a panic on FreeBSD which was caused by trying to re-initialize the swap lock. It's just much easier to initialize all of the locks at load time. It should also ensure that the vblank structures are available earlier.
2008-07-22radeon: fix typo with a better typoDave Airlie
2008-07-22radeon: fix type DST vs Z cache flushDave Airlie
2008-07-21intel-gem: Set up HWS when it needs a vaddr during GEM init.Eric Anholt
This requires an updated 2D driver to not try to set it up as well.
2008-07-21Remove accidental leftover tests.Michel Dänzer
Thanks to Nicolai Haehnle for pointing this out on IRC.
2008-07-21radeon: Post-vblank-rework-rework cleanups.Michel Dänzer
Thanks to the reworked vblank-rework, we can just use the hardware frame counter directly, and make the RADEON_PARAM_VBLANK_CRTC getparam just return what was set by the corresponding setparam.
2008-07-19i915: convert to using drm_vblank_get/put around vblank counter usageJesse Barnes
All interrupt off vblank count updates are done in drm_vblank_get/put now, so convert users of the vblank counter over to that interface.
2008-07-18radeon: remove microcode versionDave Airlie
2008-07-18drm/radeon: fixup 0 vs NULLDave Airlie
2008-07-17i915: remove old broken vblank codeJesse Barnes
Remove the unused (and broken) "in vblank" code now that the core has been fixed to use a counter while interrupts are enabled. Also make the vblank pipe get/set ioctls into dumb stub functions, since with the new code we can no longer let userspace control whether vblank interrupts are enabled, or the core code will misbehave.
2008-07-15This is a modified version of Hong's patch from last month, with a fewHong Liu
modifications to make it work correctly on my test hardware (altered the backlight write function, made it enable the legacy backlight controller interrupts on mobile hardware, sorted the interrupt function so we don't get an excessive number of vblank interrupts). This lets the backlight keys on my T61 work properly, though there's a 750msec or so delay between the request and the brightness actually changing - this sounds awfully like the hardware spinning waiting for a status flag to become ready, but as far as I can tell they're all set correctly. If anyone can figure out what's wrong here, it'd be nice to know. Some of the functions are still stubs and just tell the hardware that the request was successful. These can be filled in as kernel modesetting gets integrated. I think it's worth getting this in anyway, since it's required for backlight control to work properly on some new platforms. Signed-off-by: Matthew Garrett <mjg@redhat.com>
2008-07-15drm: add fix for PAT on radeon with 2.6.26Dave Airlie
2008-07-11intel-gem: Add two new ioctls for managing tiling on objects.Eric Anholt
Various chips have exciting interactions between the CPU and the GPU's different ways of accessing interleaved memory, so we need some kernel assistance in determining how it works. Only fully tested on GM965 so far.
2008-07-08nouveau: interface changes for nv5x 3dBen Skeggs
2008-07-03i915: official name for GM45 chipsetZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-07-01i915: only use tiled blits on 965+Jesse Barnes
When scheduled swaps occur, we need to blit between front & back buffers. I the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, only on 965 chips, since it will cause corruption on pre-965 (e.g. 945). Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-06-25nv50: when destroying a channel make sure it's not still current on PFIFOBen Skeggs
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose().
2008-06-24[intel] Get vblank pipe from irq_mask_reg instead of hardware enable regKeith Packard
With the interrupt enable/disable using only the mask register, it was wrong to use the enable register to detect which pipes had vblank detection turned on. Also, as we keep a local copy of the mask register around, and MSI machines smack the hardware during the interrupt handler, it is more efficient and more correct to use the local copy.
2008-06-24[intel] Create functions to enable/disable interruptsKeith Packard
This shares common code sequences for managing the interrupt register bits
2008-06-24i915: register definition & header file cleanupJesse Barnes
It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file.
2008-06-24[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-23nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size..Ben Skeggs
2008-06-23nv50: use same dma object for fb/tt accessBen Skeggs
We depend on the VM fully now for memory protection, separate DMA objects for VRAM and GART are unneccesary. However, until the next interface break (soon) a client can't depend on the objects being the same and must still call NV_OBJ_SET_DMA_* methods appropriately.
2008-06-23nouveau: allocate drm-use vram buffers from end of vram.Ben Skeggs
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already.
2008-06-21RADEON: 0x1002 0x5657 is actually an RV410Alex Deucher
See bug 14289