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2007-12-07Fix pipe<->plane mapping vs. vblank handling (again)Jesse Barnes
If drmMinor >= 6, the intel DDX driver will enable vblank events on both pipes. If drmMinor >= 10 on pre-965 chipsets, the intel DDX driver will swap the pipe<->plane mapping to allow for framebuffer compression on laptop screens. This means the secondary vblank counter (corresponding to pipe B) will be incremented when vblank interrupts occur. Now Mesa waits for vblank events on whichever plane has a greater portion of the displayed window. So it will happly ask to wait for the primary counter even though that one won't increment. So we can fix this in either the DDX driver, Mesa or the kernel (though I thought we already had several times). Since current (and previous) userspace assumes it's talking about a pipe == plane situation and now uses planes when talking to the kernel, we should probably just hide the mapping details there (indeed they already are hidden there for vblank swaps), which this patch does. So as far as userland is concerned, whether we call things planes or pipes is irrelevant, as long as kernel developers understand that userland hands them planes and they have to figure out which pipe that corresponds to (which will typically be the same on 965+ hardware and reversed on pre-965 mobile chips).
2007-12-05mach64: make buffer emission macros normal functionsJosé Fonseca
2007-12-05mach64: use utf-8José Fonseca
2007-12-05Remove references to the sarea_priv perf_boxes field.Kristian Høgsberg
This field isn't touched or read by any other code in the stack so it's time to retire these last few references.
2007-12-02bsd: Replace other occurrences of msleep with mtx_sleepRobert Noland
2007-12-01Clarify order of operationsRobert Noland
2007-12-01DRM_DEBUG already prints the function name.Robert Noland
2007-12-01drm: Add _DRM_DRIVER map flag.Robert Noland
This flag indicates that the driver is responsible for the map.
2007-11-30nouveau: Properly identify NV40 and NV44 generation.Maarten Maathuis
2007-11-29Beside the emitted warning, the added cast (u64 -> unsigned) strips outJiri Slaby
part of address on 64 bit. Cast to unsigned long instead. Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
2007-11-29drm: more cleanupsDave Airlie
2007-11-28i965: oops force mi batchbuffer startDave Airlie
2007-11-27r500: add a bunch of all r5xx pci ids..Dave Airlie
fix up a range that may be needed for r500 mesa
2007-11-22drm: major whitespace/coding style realignment with kernelDave Airlie
2007-11-22i915: add context handle to superioctl structDave Airlie
This will be used later for lockless operation.
2007-11-22r500: add pci id for X1650Dave Airlie
2007-11-21r500: suggestion from glisse to not add cliprect offset on r5xxDave Airlie
2007-11-20radeon: add initial r5xx supportDave Airlie
2007-11-19Fix capitalization of __linux__ define.Eric Anholt
2007-11-18Bug #13233: Fix build on FreeBSD.Robert Noland
2007-11-18radeon: refactor out the fb/agp location read/write.Dave Airlie
Add a new get param to get the fb location into userspace. Mesa currently hits MMIO to do this, but this isn't always possible.
2007-11-16nouveau: also mention the number of succcessfully copied bios bytes.Stephane Marchesin
2007-11-15nouveau: be verbose about PPC bios for now.Stephane Marchesin
2007-11-15nouveau: revert the nv34 context size change, it was not the culprit after all.Stephane Marchesin
2007-11-15nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels.Stephane Marchesin
2007-11-15nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output ↵Stephane Marchesin
detection in user space.
2007-11-15intel: add flushing for i8xx chipsets.Dave Airlie
Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM code paths
2007-11-14nouveau: nv30: missing ramin init, does it brake other hw?Patrice Mandin
2007-11-14Add new shared header file drm_internal.h.Kristian Høgsberg
This header file is shared across linux and bsd, but is not installed for user space to access. It's the place to put prototypes and data types that aren't platform or chipset specific, but still internal to the drm.
2007-11-14nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards.Stephane Marchesin
2007-11-14nouveau: Also wait until CACHE1 gets emptied.Ben Skeggs
2007-11-14Revert "nouveau: stub superioctl"Ben Skeggs
This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed. Err.. didn't mean for that to slip in :)
2007-11-14Merge branch 'fifo-cleanup' into upstream-masterBen Skeggs
2007-11-14nouveau: Attempt to wait for channel idle before we destroy it.Ben Skeggs
2007-11-14nouveau: Use "new" NV40 USER control regs.Ben Skeggs
Probably entirely pointless, but a simple change in any case.
2007-11-14nouveau: store user control reg offsets in channel structBen Skeggs
2007-11-14nouveau: funcs to determine active channel on PFIFO.Ben Skeggs
2007-11-14nouveau: stub superioctlBen Skeggs
2007-11-07i915: oops disable TTM is backwardsDave Airlie
2007-11-06i915: disable TTM on 8xx chips for now until flushing is solvedDave Airlie
2007-11-06[PATCH] i915: fix missing G33 detect in IS_I9XXZhenyu Wang
G33 detect seems missing with Jesse's suspend/resume patch.
2007-11-06i915: cleanup most of the whitespaceDave Airlie
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-11-04nouveau: more nv20_graph_init.Pekka Paalanen
This patch is originally from malc0_, but since it used some NV40_* regs, I edited them into hex values with a comment. This seems to correspond quite well with my own mmio-trace, for the parts I cared to check.
2007-11-05nouveau: Use a sw method instead of notify interrupt to signal fence completion.Ben Skeggs
2007-11-05nouveau: cleanupsBen Skeggs
2007-11-05nouveau: only pass annoying messages if irq isn't handled fully.Ben Skeggs
2007-11-05nouveau: hook up an inital fence irq handlerBen Skeggs
2007-11-05nouveau: crappy ttm mm init, disabled for now.Ben Skeggs
2007-11-02nouveau: put it all together.Jeremy Kolb
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