Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-07-15 | drm: add fix for PAT on radeon with 2.6.26 | Dave Airlie | |
2008-07-08 | nouveau: interface changes for nv5x 3d | Ben Skeggs | |
2008-07-03 | i915: official name for GM45 chipset | Zhenyu Wang | |
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> | |||
2008-07-01 | i915: only use tiled blits on 965+ | Jesse Barnes | |
When scheduled swaps occur, we need to blit between front & back buffers. I the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, only on 965 chips, since it will cause corruption on pre-965 (e.g. 945). Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> | |||
2008-06-25 | nv50: when destroying a channel make sure it's not still current on PFIFO | Ben Skeggs | |
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose(). | |||
2008-06-24 | i915: register definition & header file cleanup | Jesse Barnes | |
It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file. | |||
2008-06-23 | nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size.. | Ben Skeggs | |
2008-06-23 | nv50: use same dma object for fb/tt access | Ben Skeggs | |
We depend on the VM fully now for memory protection, separate DMA objects for VRAM and GART are unneccesary. However, until the next interface break (soon) a client can't depend on the objects being the same and must still call NV_OBJ_SET_DMA_* methods appropriately. | |||
2008-06-23 | nouveau: allocate drm-use vram buffers from end of vram. | Ben Skeggs | |
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already. | |||
2008-06-21 | RADEON: 0x1002 0x5657 is actually an RV410 | Alex Deucher | |
See bug 14289 | |||
2008-06-20 | r300: fix warning | Dave Airlie | |
2008-06-18 | i915: Add support for Intel 4 series chipsets | Zhenyu Wang | |
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> | |||
2008-06-15 | radeon: *really* fix screen corruption thanks to Lukasz Krotowski | Jerome Glisse | |
2008-06-15 | radeon: actualy try to fix the corruption | Jerome Glisse | |
2008-06-15 | radeon: fix screen corruption introduced by last patch | Jerome Glisse | |
2008-06-13 | radeon: bump driver date to know if lockup fix is in | Jerome Glisse | |
2008-06-13 | radeon: r345xx fixe hard lockup | Jerome Glisse | |
This patch should fixe hard lockup and convert them in softlockup (ie you can ssh the box but the gpu is busted and we are waiting in loop for it to come back to reason). | |||
2008-06-11 | RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT | Alex Deucher | |
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT. | |||
2008-06-10 | xgixp: Remove dependency on TTM fences | Ian Romanick | |
2008-06-09 | RADEON: Add untested support for RS400 chips | Alex Deucher | |
GART setup appears to work the same as RS480 chips. Also RC4xx chips are actually RS400 based, not RS480 based. | |||
2008-06-09 | RADEON: switch IGP gart to use radeon_write_agp_base() | Alex Deucher | |
2008-06-08 | Fix typo in i915_suspend | Robert Noland | |
Reported by vehemens | |||
2008-06-08 | I915 suspend/resume for FreeBSD | Robert Noland | |
2008-06-09 | r300/r500: add hier-z regs | Dave Airlie | |
2008-06-05 | radeon: Restore software interrupt on resume. | Dennis Kasprzyk | |
Fixes performance drop after suspend/resume on some systems. | |||
2008-06-03 | drm: sg alloc should write back the handle to userspace | Dave Airlie | |
2008-05-30 | RADEON: fix typo in last commit | Alex Deucher | |
2008-05-30 | r500: attempt to make AGP work by programming agp base in the MC correctly | Dave Airlie | |
2008-05-28 | radeon: split microcode out into a separate header file. | Dave Airlie | |
2008-05-28 | i915: fix BSD bh, DRI2 not uses anywhere else | Dave Airlie | |
2008-05-28 | radeon: bump release date/version for r500 3D support | Dave Airlie | |
2008-05-27 | RADEON: add get_param for number of GB pipes | Alex Deucher | |
2008-05-27 | [i915] Fix typo in (unused) START_ADDR definition. | Jie Luo | |
2008-05-27 | [FreeBSD] Add vblank-rework support and get drivers building. | Robert Noland | |
The i915 driver now works again. | |||
2008-05-23 | r500: add two more register ranges for mesa driver to setup | Dave Airlie | |
2008-05-23 | drm: fix nouveau warning | Dave Airlie | |
2008-05-21 | rs690/r500: vblank support. | Dave Airlie | |
The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips | |||
2008-05-17 | r500: add more register ranges for Mesa driver | Dave Airlie | |
2008-05-13 | RS4xx: separate out RS400 and RS480 IGP chips | Alex Deucher | |
RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480. | |||
2008-05-12 | RADEON: fix copy/pasto in last commit | Alex Deucher | |
2008-05-12 | R3/4/5: init pipe setup in drm | Alex Deucher | |
Similar (broken) code in mesa needs to be removed | |||
2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
2008-05-12 | R300+: fixup PURGE/FLUSH macros | Alex Deucher | |
2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
first step in merging rs4xx/rs6xx gart setup | |||
2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
2008-05-05 | r500: add allowed range for us config/pixsize | Dave Airlie | |