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2007-04-11Add aperture size and preallocation probing (from intelfb), cleanup load ↵Jesse Barnes
code to be more general.
2007-04-11fix modeset cleanup for LVDS and reenable it in i915.Jesse Barnes
2007-04-11Various changes for in-kernel modesetting:Jesse Barnes
- allow drm_buffer_object_create to be called w/o dev_mapping - fixup i915 init code to allocate memory, fb and set modes right - pass fb to drm_initial_config for setup - change some debug output to make it easier to spot - fixup lvds code to use DDC probing correctly
2007-04-11add support for setting a framebuffer depthDavid Airlie
2007-04-11add initial drm_fb framebufferDave Airlie
So far I can load fbcon, once I use my miniglx to add a framebuffer. fbcon doesn't show anything on screen but baby steps and all that.
2007-04-11comment out unworkable codeDave Airlie
2007-04-11only init at driver loadDave Airlie
2007-04-11use the baseaddr at leastDave Airlie
2007-04-11add an fb count + id get to the get resources code pathDavid Airlie
2007-04-10Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm ↵Jesse Barnes
into origin/modesetting-101 Conflicts: linux-core/drm_crtc.c - trivial merge linux-core/drm_crtc.h - trivial merge linux-core/intel_display.c - crtc_config -> mode_config shared-core/i915_dma.c - accommodate new init code in i915_init.c
2007-04-10Move i915 init code to new file, i915_init.c, and create a new high levelJesse Barnes
init routine that runs at driver load time.
2007-04-10Add save/restore state for LVDS code, along with a few other LVDS relatedJesse Barnes
items to i915 private structure.
2007-04-10export output name to userspaceDavid Airlie
2007-04-10set the base address of the CRTC correctlyDavid Airlie
2007-04-10fixup numerous issues with adding framebuffer supportDavid Airlie
This still isn't perfect but it fixes a few oopses and cleans up some of the tabs and bugs in the original fb limit code
2007-04-10add addfb/rmfb ioctlsJakob Bornecrantz
Originally from Jakob, cleaned up by airlied.
2007-04-05checkpoint commit: implement SetCrtc so modes can in theory be set from userDave Airlie
This hooks up the userspace mode set it "seems" to work.
2007-04-05checkpoint commit: added getresources, crtc and outputDave Airlie
This adds the user interfaces from Jakob and hooks them up for 3 ioctls GetResources, GetCrtc and GetOutput. I've made the ids for everything fbs, crtcs, outputs and modes go via idr as per krh's suggestion on irc as it make the code nice and consistent.
2007-04-05initial userspace interface to get modesDave Airlie
2007-04-05Initial import of modesetting for intel driver in DRMDave Airlie
2007-04-03Make sure we ack irqs before we read a breadcrumb so thatThomas Hellstrom
breadcrumb updates that occur _AFTER_ we've read the breadcrumb really generates a new IRQ.
2007-04-02r300: Synchronize the register header file again.Oliver McFadden
It's a good idea to keep these synchronized; even though the DRM doesn't use all the defines, maintaining two different copies is prone to errors when the diff gets bigger.
2007-04-01nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+Matthieu Castet
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file. Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01nouveau : nv10 ctx switch fixMatthieu Castet
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01nouveau : set the correct PGRAPH_CTX_CONTROL registerMatthieu Castet
"5a072f32 (Stephane Marchesin 2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-03-30Merge branch 'crestline-qa', adding support for the 965GM chipset.Eric Anholt
2007-03-29nouveau: fix nv04 context switches.Stephane Marchesin
2007-03-27drm/i915: set the bo up at firstopen time not after DMA initDave Airlie
This is required to use TTM to allocate the ring buffer.
2007-03-27Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-23Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-23nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOsBen Skeggs
2007-03-23nouveau: remove unused cruftBen Skeggs
2007-03-21Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-21nouveau: support multiple channels per client (breaks drm interface)Ben Skeggs
2007-03-19Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-19more whitespace issuesDave Airlie
2007-03-19whitespace cleanup pending a kernel mergeDave Airlie
2007-03-14Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-13r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; notOliver McFadden
enough information is known about them to be sure as to what the values mean.
2007-03-13Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-13Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.Oliver McFadden
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these values are really unknown; ideally more reverse engineering should be done to determine what these values mean and when they should be set.
2007-03-13nouveau: make sure cmdbuf object gets destroyedBen Skeggs
2007-03-13nouveau: associate all created objects with a channel + cleanupsBen Skeggs
2007-03-13nouveau: s/fifo/channel/Ben Skeggs
2007-03-13Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to eitherOliver McFadden
R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
2007-03-13Guess another unknown register used for R300 pacification.Oliver McFadden
2007-03-12Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-11nouveau: PUT,GET, not 2xPUTPatrice Mandin
2007-03-07Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
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