| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-09-29 | radeon: Commit the ring after each partial texture upload blit. | chaohong guo | |
| This makes sure each blit starts as early as possible, which may improve texture upload performance in some cases. | |||
| 2007-09-28 | nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array. | Matthieu Castet | |
| This avoid hardcoding pgraph_ctx size and potential buffer overflow. | |||
| 2007-09-28 | Revert drm_i915_flip_t braindamage | Jesse Barnes | |
| I should not have renamed this field. I should not have renamed this field. I should not have renamed this field. On the plus side, it was at least binary compatible. | |||
| 2007-09-27 | Create memory pool for TT memory | Alan Hourihane | |
| 2007-09-25 | Hack out i915_mem_takedown | Jesse Barnes | |
| We may want to make the old i915 memory manager obsolete eventually, and in the meantime the takedown causes problems on unload so remove it for now. | |||
| 2007-09-25 | Merge branch 'master' into pre-superioctl-branch | Thomas Hellstrom | |
| Conflicts: linux-core/drm_bo.c linux-core/drm_fence.c linux-core/drm_objects.h shared-core/drm.h | |||
| 2007-09-25 | drm: use fence_class as name instead of class | Dave Airlie | |
| 2007-09-24 | Add 965GM macro bits | Jesse Barnes | |
| Update IS_MOBILE macro to include new IS_I965GM test. | |||
| 2007-09-24 | Merge branch 'master' into modesetting-101 - TTM & typedef removal | Jesse Barnes | |
| Conflicts: linux-core/drmP.h linux-core/drm_bo.c linux-core/drm_drv.c linux-core/drm_objects.h shared-core/drm.h shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c Mostly removing typedefs that snuck into the modesetting code and updating to the latest TTM APIs. As of today, the i915 driver builds, but there are likely to be problems, so debugging and bugfixes will come next. | |||
| 2007-09-22 | Add fence error member. | Thomas Hellstrom | |
| Modify the TTM backend bind arguments. Export a number of functions needed for driver-specific super-ioctls. Add a function to map buffer objects from the kernel, regardless of where they're currently placed. A number of error fixes. | |||
| 2007-09-21 | Merge branch 'bo-set-pin' | Eric Anholt | |
| This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a separate privileged ioctl to pin buffers like NO_EVICT meant before. The functionality that was supposed to be covered by NO_MOVE may be reintroduced later, possibly in a different way, after the superioctl branch is merged. | |||
| 2007-09-21 | Add some more verbosity to drm_bo_set_pin_req comments. | Eric Anholt | |
| 2007-09-21 | nouveau: fix ppc and get it right this time. | Stephane Marchesin | |
| 2007-09-21 | nouveau: fix notifiers on PPC. | Stephane Marchesin | |
| 2007-09-21 | nouveau: add some checks to the nv04 graph switching code. | Stephane Marchesin | |
| 2007-09-19 | Merge branch 'origin' into bo-set-pin | Eric Anholt | |
| 2007-09-18 | i915: Reinstate check that drawable has valid information in i915_vblank_swap. | Michel Dänzer | |
| 2007-09-18 | i915: Fix scheduled buffer swaps. | Michel Dänzer | |
| One instance of unlocking a spinlock was converted incorrectly when this code was fixed to build on BSD. | |||
| 2007-09-18 | Add ioc32 compat layer for XGI DRM. | Ian Romanick | |
| 2007-09-12 | Remove plane->pipe mapping from SAREA private after all | Jesse Barnes | |
| We can figure out which pipe a given plane is mapped to by looking at the display control registers instead of tracking it in a new SAREA private field. If this becomes a performance problem, we could move to an ioctl based solution by adding a new parameter for the DDX to set (defaulting to the old behavior if the param was never set of course). | |||
| 2007-09-11 | Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm | Jesse Barnes | |
| 2007-09-11 | Disambiguate planes & pipes for swap operations | Jesse Barnes | |
| This mod makes the SAREA track plane to pipe mappings and corrects the name of the plane info variables (they were mislabeled as pipe info since until now all code assumed a direct mapping between planes and pipes). It also updates the flip ioctl argument to take a set of planes rather than pipes, since planes are flipped while pipes generate vblank events. | |||
| 2007-09-10 | nouveau: nv10: add combiner registers | Patrice Mandin | |
| 2007-09-09 | nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load | Matthieu Castet | |
| 2007-09-09 | nouveau : nv10 pipe ctx switch load/save. | Matthieu Castet | |
| This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes | |||
| 2007-09-08 | nouveau: Add Quadro NVS 140 pciid | Maarten Maathuis | |
| 2007-09-07 | nouveau: Use nv41 ctxprog/vals on nv42. | Ben Skeggs | |
| 2007-09-06 | Merge branch 'xgi-0-0-2' | Ian Romanick | |
| 2007-09-06 | nouveau: fix some nv04 graph switching. | Stephane Marchesin | |
| 2007-09-06 | nouveau: add pure nv30 support. | Stephane Marchesin | |
| 2007-09-04 | Add context init voodoo and context switch code for NV41. | Maarten Maathuis | |
| 2007-08-31 | Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into ↵ | Ian Romanick | |
| xgi-0-0-2 | |||
| 2007-08-31 | nouveau: nv04 context switching support. Works for starting X up at least. | Stephane Marchesin | |
| 2007-08-31 | nouveau: give nv03 the last cut. | Stephane Marchesin | |
| 2007-08-28 | Add register defines for hw binning | Keith Packard | |
| 2007-08-28 | drm: remove XFREE86_VERSION macros | Dave Airlie | |
| 2007-08-26 | nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition | Matthieu Castet | |
| - fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+ | |||
| 2007-08-25 | nouveau : nv1x graph reworks | Matthieu Castet | |
| - add forgotten init value - use the same PGRAPH_DEBUG than the blob - remove init of ddx reg : it should be done with object - better handle of channel destruction hope I didn't break anything ;) | |||
| 2007-08-25 | nouveau: nv10: output a warning if last channel invalid, and switch to next | Patrice Mandin | |
| 2007-08-23 | nouveau: nv10: check some NULL pointers inside context switch | Patrice Mandin | |
| 2007-08-22 | nouveau : fix some potential crashes with objects causing hash collision | Matthieu Castet | |
| 2007-08-22 | nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do. | Ben Skeggs | |
| 2007-08-22 | nouveau/nv40: Dump extra info on ucode state if ctx switch fails. | Ben Skeggs | |
| 2007-08-22 | nouveau: NV4c ctx ucode. | Ben Skeggs | |
| Seems we already have a nv4c_ctx_init() somehow, a quick check shows the ucode matches it still. | |||
| 2007-08-22 | nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit. | Ben Skeggs | |
| 2007-08-22 | nouveau: redo nv30_graph.c. Should work better, but we still lack a couple ↵ | Stephane Marchesin | |
| of cards. | |||
| 2007-08-22 | nouveau: fix the comment and debug message for PCIGART size | Stephane Marchesin | |
| 2007-08-21 | nouveau: Add NV44 ctx ucode. Patch from stillunknown. | Ben Skeggs | |
| Microcode is similar enough to the NV4A one that it should be able to use the same initial PGRAPH context. One day this mess will go away, honest.. | |||
| 2007-08-21 | nouveau: Poke 0x2230 on NV47 also. | Ben Skeggs | |
| Makes 0x2220 work the same way as on NV40. | |||
| 2007-08-19 | Check also for Linux, as it's not supported on different OS | Patrice Mandin | |
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core