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2008-05-23drm: fix nouveau warningDave Airlie
2008-05-21rs690/r500: vblank support.Dave Airlie
The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips
2008-05-17r500: add more register ranges for Mesa driverDave Airlie
2008-05-13RS4xx: separate out RS400 and RS480 IGP chipsAlex Deucher
RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480.
2008-05-12RADEON: fix copy/pasto in last commitAlex Deucher
2008-05-12R3/4/5: init pipe setup in drmAlex Deucher
Similar (broken) code in mesa needs to be removed
2008-05-12RADEON: cleanup radeon_do_engine_reset()Alex Deucher
2008-05-12R300+: fixup pixcache flushAlex Deucher
2008-05-12RS4xx: fix MCIND index maskAlex Deucher
2008-05-12RADEON: write AGP_BASE_2 on chips that support itAlex Deucher
2008-05-12R300+: fixup PURGE/FLUSH macrosAlex Deucher
2008-05-12Radeon IGP: merge RS4xx/RS6xx gart setupAlex Deucher
2008-05-12Radeon IGP: wrap MCIND accessAlex Deucher
first step in merging rs4xx/rs6xx gart setup
2008-05-12Radeon IGP: clean up registers and magic numbersAlex Deucher
2008-05-05r500: add allowed range for us config/pixsizeDave Airlie
2008-05-02nv50: enable 0x400500 bit 0 after PGRAPH exception alsoBen Skeggs
No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :)
2008-05-02nouveau: guard against channels potentially not having a context, fix nv50Ben Skeggs
2008-05-02nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.Ben Skeggs
This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet.
2008-05-02nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handlerBen Skeggs
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown.
2008-05-02nouveau: gather nsource in trap_info()Ben Skeggs
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02nv50: PGRAPH exception handling completely different from earlier chipsBen Skeggs
2008-05-01nv50: I cave... Add nv84 initial context values.Ben Skeggs
I swore I'd actually do this properly and not go the horrible route we did with nv4x, but I won't get around to it just yet with so many *actually* interesting things to do first.. One day. Since someone already added nv86, why not!
2008-04-29i915: fix off by one in VGA save/restore of AR & CR regsJesse Barnes
Turns out it's important to save/restore AR14 in particular.
2008-04-29nouveau: NV9x cards exist as well.Maarten Maathuis
2008-04-27Use fixed sized types in new ioctlsJesse Barnes
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat issues.
2008-04-26Enum-ectomy of vblank modesetting ioctlJesse Barnes
Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-23i915: fix for compatibility modeXiang, Haihao
2008-04-22i915: gfx hw and i945gme fixes from upstreamDave Airlie
From Jesse and Zhenyu originally.
2008-04-20[I915] Handle tiled buffers in vblank taskletKeith Packard
The vblank tasklet update code must build 2D blt commands with the appropriate tiled flags.
2008-04-20On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblankKeith Packard
The batchbuffer submission paths were fixed to use the 965-specific command, but the vblank tasklet was not. When the older version is sent, the 965 will lock up.
2008-04-11Save and restore dsparb and d_state regsKeith Packard
2008-04-05nv50: primitive i2c interrupt handlerMaarten Maathuis
2008-04-03nv50: primitive display interrupt handler.Maarten Maathuis
2008-03-31nouveau: fix return from function..Dave Airlie
dude kernel moduless use kernel errors :) this fixes an oops on init when this codepath hits.
2008-03-30nouveau: forgot to add a breakMaarten Maathuis
2008-03-30nouveau: Add ctx values for nv86.Maarten Maathuis
- Note that this may not work for all nv86.
2008-03-30drm/r300: fix wait interface mixupDave Airlie
This interface was defined completely wrong, however userspace has only ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use it properly.
2008-03-29r300: Correctly translate the value for the R300_CMD_WAIT command.Oliver McFadden
Previously, the R300_CMD_WAIT command would write the passed directly to the hardware. However this is incorrect because the R300_WAIT_* values used are internal interface values that do not map directly to the hardware. The new function I have added translates the R300_WAIT_* values into appropriate values for the hardware before writing the register. Thanks to John Bridgman for pointing this out. :-)
2008-03-25nouveau: nv20 bios does not initialise PTIMERStuart Bennett
The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw
2008-03-24i915: fix oops on agp=offDave Airlie
Kernel bug 10289.
2008-03-24Merge branch 'r500-fp'Dave Airlie
2008-03-24nv40: voodoo - not quite.Ben Skeggs
2008-03-24nv40: allocate massive amount of PRAMIN for grctx on all chipsets.Ben Skeggs
More or less a workaround for issues on some chipsets where a context switch results in critical data in PRAMIN being overwritten by the GPU. The correct fix is known, but may take some time before it's a feasible option.
2008-03-21r500: fragment program upload is also used to upload constants.Dave Airlie
Limit frag address to 8 bits
2008-03-20drm: fixup r500fp submissionDave Airlie
2008-03-20nouveau: do not set on-board timer's numerator/denominator to bad valuesStuart Bennett
2008-03-19RADEON: switch over to new production microcodeAlex Deucher
This needs to be tested thoroughly before pushing to the kernel.
2008-03-19RADEON: production microcode for all radeons, r1xx-r6xxAlex Deucher
This updated microcode is not in use yet.
2008-03-19move some more r300 regs into not allowed on r500Dave Airlie
2008-03-18drm: add new rs690 pci idDave Airlie