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2008-07-26r300_cmdbuf: Always emit INDX_BUFFER immediately after DRAW_INDEXNicolai Haehnle
DRAW_INDEX writes a vertex count to VAP_VF_CNTL. Docs say that behaviour is undefined (i.e. lockups happen) when this write is not followed by the right number of vertex indices. Thus we used to do the wrong thing when drawing across many cliprects was necessary, because we emitted a sequence DRAW_INDEX, DRAW_INDEX, INDX_BUFFER, INDX_BUFFER instead of DRAW_INDEX, INDX_BUFFER, DRAW_INDEX, INDX_BUFFER The latter is what we're doing now and which ought to be correct.
2008-07-26radeon: add initial atombios modesetting and GEM -> TTM translation layer.Dave Airlie
This is an initial import of the atom bios parser with modesetting support for r500 hw using atombios. It also includes a simple memory manager layer that translates a radeon GEM style interface onto TTM internally. So far this memory manager has only been used for pinned object allocation for the DDX to test modesetting.
2008-07-26Merge remote branch 'origin/modesetting-101' into modesetting-gemDave Airlie
2008-07-23i915: Move all of the irq install/uninstall to load time.Robert Noland
This resolves a panic on FreeBSD which was caused by trying to re-initialize the swap lock. It's just much easier to initialize all of the locks at load time. It should also ensure that the vblank structures are available earlier.
2008-07-22radeon: fix typo with a better typoDave Airlie
2008-07-22radeon: fix type DST vs Z cache flushDave Airlie
2008-07-21intel-gem: Set up HWS when it needs a vaddr during GEM init.Eric Anholt
This requires an updated 2D driver to not try to set it up as well.
2008-07-21Remove accidental leftover tests.Michel Dänzer
Thanks to Nicolai Haehnle for pointing this out on IRC.
2008-07-21radeon: Post-vblank-rework-rework cleanups.Michel Dänzer
Thanks to the reworked vblank-rework, we can just use the hardware frame counter directly, and make the RADEON_PARAM_VBLANK_CRTC getparam just return what was set by the corresponding setparam.
2008-07-20modesetting-101: implement optional scaling and dithering propertiesMaarten Maathuis
2008-07-19i915: convert to using drm_vblank_get/put around vblank counter usageJesse Barnes
All interrupt off vblank count updates are done in drm_vblank_get/put now, so convert users of the vblank counter over to that interface.
2008-07-18nv50: use same dma object for fb/tt accessBen Skeggs
We depend on the VM fully now for memory protection, separate DMA objects for VRAM and GART are unneccesary. However, until the next interface break (soon) a client can't depend on the objects being the same and must still call NV_OBJ_SET_DMA_* methods appropriately.
2008-07-18nouveau: interface changes for nv5x 3dBen Skeggs
2008-07-18radeon: remove microcode versionDave Airlie
2008-07-18drm/radeon: fixup 0 vs NULLDave Airlie
2008-07-17i915: remove old broken vblank codeJesse Barnes
Remove the unused (and broken) "in vblank" code now that the core has been fixed to use a counter while interrupts are enabled. Also make the vblank pipe get/set ioctls into dumb stub functions, since with the new code we can no longer let userspace control whether vblank interrupts are enabled, or the core code will misbehave.
2008-07-15This is a modified version of Hong's patch from last month, with a fewHong Liu
modifications to make it work correctly on my test hardware (altered the backlight write function, made it enable the legacy backlight controller interrupts on mobile hardware, sorted the interrupt function so we don't get an excessive number of vblank interrupts). This lets the backlight keys on my T61 work properly, though there's a 750msec or so delay between the request and the brightness actually changing - this sounds awfully like the hardware spinning waiting for a status flag to become ready, but as far as I can tell they're all set correctly. If anyone can figure out what's wrong here, it'd be nice to know. Some of the functions are still stubs and just tell the hardware that the request was successful. These can be filled in as kernel modesetting gets integrated. I think it's worth getting this in anyway, since it's required for backlight control to work properly on some new platforms. Signed-off-by: Matthew Garrett <mjg@redhat.com>
2008-07-15drm: add fix for PAT on radeon with 2.6.26Dave Airlie
2008-07-11intel-gem: Add two new ioctls for managing tiling on objects.Eric Anholt
Various chips have exciting interactions between the CPU and the GPU's different ways of accessing interleaved memory, so we need some kernel assistance in determining how it works. Only fully tested on GM965 so far.
2008-07-09Merge remote branch 'origin/modesetting-101' into modesetting-gemDave Airlie
2008-07-08nouveau: interface changes for nv5x 3dBen Skeggs
2008-07-07Add back flink, open and close ioctls.Kristian Høgsberg
They fell through the cracks in 86accbcb.
2008-07-07Merge commit 'origin/drm-gem' into ms-gemKristian Høgsberg
Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_stub.c linux-core/i915_drv.c linux-core/i915_gem.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-07-06modesetting-101: Rename DPMS modes to avoid compatibility issues with xorg ↵Maarten Maathuis
definitions.
2008-07-06modesetting-101: rename modeflags, as to avoid conflicts with the xorg ↵Maarten Maathuis
definitions
2008-07-05modesetting-101: Make the interface variable names a little more consistent ↵Maarten Maathuis
+ modeprint changes. - All things are now called _id when they are id's. - modeprint now accepts driver name as first argument.
2008-07-04modesetting-101: Move some defines used for enumeration into the public header.Maarten Maathuis
- Otherwise userspace has no idea of the meaning.
2008-07-04modesetting: rip out all of the generation code.Dave Airlie
not needed, hotplug will work just as well hopefully.
2008-07-03nv50: s/FALSE/false && s/TRUE/trueMaarten Maathuis
2008-07-03i915: official name for GM45 chipsetZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-07-02NV50: basic fbcon + misc fixesMaarten Maathuis
- There is one fb, used for as many outputs as possible. - Eventually smaller screens will be scaled to see the full console, but for the moment this'll do.
2008-07-01i915: only use tiled blits on 965+Jesse Barnes
When scheduled swaps occur, we need to blit between front & back buffers. I the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, only on 965 chips, since it will cause corruption on pre-965 (e.g. 945). Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01NV50: some i2c cleanupMaarten Maathuis
2008-06-27NV50: use list_head item instead of list_head head to avoid confusionMaarten Maathuis
2008-06-25NV50: i misunderstood NOUVEAU_MEM_INTERNAL, so remove itMaarten Maathuis
2008-06-25NV50: Some cleanup and fixes.Maarten Maathuis
2008-06-25nv50: when destroying a channel make sure it's not still current on PFIFOBen Skeggs
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose().
2008-06-25nouveau: allocate drm-use vram buffers from end of vram.Ben Skeggs
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already.
2008-06-25nv50: when destroying a channel make sure it's not still current on PFIFOBen Skeggs
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose().
2008-06-24[intel] Get vblank pipe from irq_mask_reg instead of hardware enable regKeith Packard
With the interrupt enable/disable using only the mask register, it was wrong to use the enable register to detect which pipes had vblank detection turned on. Also, as we keep a local copy of the mask register around, and MSI machines smack the hardware during the interrupt handler, it is more efficient and more correct to use the local copy.
2008-06-24[intel] Create functions to enable/disable interruptsKeith Packard
This shares common code sequences for managing the interrupt register bits
2008-06-24i915: register definition & header file cleanupJesse Barnes
It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file.
2008-06-24[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-22nouveau: disable KMS for pre-NV50 even when specifically enabledMaarten Maathuis
2008-06-23nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size..Ben Skeggs
2008-06-23nv50: use same dma object for fb/tt accessBen Skeggs
We depend on the VM fully now for memory protection, separate DMA objects for VRAM and GART are unneccesary. However, until the next interface break (soon) a client can't depend on the objects being the same and must still call NV_OBJ_SET_DMA_* methods appropriately.
2008-06-23nouveau: allocate drm-use vram buffers from end of vram.Ben Skeggs
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already.
2008-06-22NV50: Initial import of kernel modesetting.Maarten Maathuis
2008-06-21RADEON: 0x1002 0x5657 is actually an RV410Alex Deucher
See bug 14289
2008-06-21[intel] Use IMR instead of IER to pend interrupts during ISRKeith Packard
Noting that the interrupt mask register was more reliable than the interrupt enable register for managing interrupts in user_irq_on/user_irq_off, this patch replaces the remaining IER frobbing with IMR instead. The test which exposes IER related failures is: $ glxgears & glxgears & glxgears (reposition the glxgears windows away from the upper left corner) $ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done & $ while :; do runoa; runet; done &