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2008-06-13radeon: r345xx fixe hard lockupJerome Glisse
This patch should fixe hard lockup and convert them in softlockup (ie you can ssh the box but the gpu is busted and we are waiting in loop for it to come back to reason).
2008-06-11RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTATAlex Deucher
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-10xgixp: Remove dependency on TTM fencesIan Romanick
2008-06-09RADEON: Add untested support for RS400 chipsAlex Deucher
GART setup appears to work the same as RS480 chips. Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09RADEON: switch IGP gart to use radeon_write_agp_base()Alex Deucher
2008-06-08Fix typo in i915_suspendRobert Noland
Reported by vehemens
2008-06-08I915 suspend/resume for FreeBSDRobert Noland
2008-06-09r300/r500: add hier-z regsDave Airlie
2008-06-05radeon: Restore software interrupt on resume.Dennis Kasprzyk
Fixes performance drop after suspend/resume on some systems.
2008-06-03drm: sg alloc should write back the handle to userspaceDave Airlie
2008-05-30RADEON: fix typo in last commitAlex Deucher
2008-05-30r500: attempt to make AGP work by programming agp base in the MC correctlyDave Airlie
2008-05-28radeon: split microcode out into a separate header file.Dave Airlie
2008-05-28i915: fix BSD bh, DRI2 not uses anywhere elseDave Airlie
2008-05-28radeon: bump release date/version for r500 3D supportDave Airlie
2008-05-27RADEON: add get_param for number of GB pipesAlex Deucher
2008-05-27[i915] Fix typo in (unused) START_ADDR definition.Jie Luo
2008-05-27[FreeBSD] Add vblank-rework support and get drivers building.Robert Noland
The i915 driver now works again.
2008-05-23r500: add two more register ranges for mesa driver to setupDave Airlie
2008-05-23drm: fix nouveau warningDave Airlie
2008-05-21rs690/r500: vblank support.Dave Airlie
The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips
2008-05-17r500: add more register ranges for Mesa driverDave Airlie
2008-05-13RS4xx: separate out RS400 and RS480 IGP chipsAlex Deucher
RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480.
2008-05-12RADEON: fix copy/pasto in last commitAlex Deucher
2008-05-12R3/4/5: init pipe setup in drmAlex Deucher
Similar (broken) code in mesa needs to be removed
2008-05-12RADEON: cleanup radeon_do_engine_reset()Alex Deucher
2008-05-12R300+: fixup pixcache flushAlex Deucher
2008-05-12RS4xx: fix MCIND index maskAlex Deucher
2008-05-12RADEON: write AGP_BASE_2 on chips that support itAlex Deucher
2008-05-12R300+: fixup PURGE/FLUSH macrosAlex Deucher
2008-05-12Radeon IGP: merge RS4xx/RS6xx gart setupAlex Deucher
2008-05-12Radeon IGP: wrap MCIND accessAlex Deucher
first step in merging rs4xx/rs6xx gart setup
2008-05-12Radeon IGP: clean up registers and magic numbersAlex Deucher
2008-05-05r500: add allowed range for us config/pixsizeDave Airlie
2008-05-02nv50: enable 0x400500 bit 0 after PGRAPH exception alsoBen Skeggs
No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :)
2008-05-02nouveau: guard against channels potentially not having a context, fix nv50Ben Skeggs
2008-05-02nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.Ben Skeggs
This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet.
2008-05-02nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handlerBen Skeggs
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown.
2008-05-02nouveau: gather nsource in trap_info()Ben Skeggs
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02nv50: PGRAPH exception handling completely different from earlier chipsBen Skeggs
2008-05-01nv50: I cave... Add nv84 initial context values.Ben Skeggs
I swore I'd actually do this properly and not go the horrible route we did with nv4x, but I won't get around to it just yet with so many *actually* interesting things to do first.. One day. Since someone already added nv86, why not!
2008-04-29i915: fix off by one in VGA save/restore of AR & CR regsJesse Barnes
Turns out it's important to save/restore AR14 in particular.
2008-04-29nouveau: NV9x cards exist as well.Maarten Maathuis
2008-04-27Use fixed sized types in new ioctlsJesse Barnes
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat issues.
2008-04-26Enum-ectomy of vblank modesetting ioctlJesse Barnes
Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-23i915: fix for compatibility modeXiang, Haihao
2008-04-22i915: gfx hw and i945gme fixes from upstreamDave Airlie
From Jesse and Zhenyu originally.
2008-04-20[I915] Handle tiled buffers in vblank taskletKeith Packard
The vblank tasklet update code must build 2D blt commands with the appropriate tiled flags.
2008-04-20On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblankKeith Packard
The batchbuffer submission paths were fixed to use the 965-specific command, but the vblank tasklet was not. When the older version is sent, the 965 will lock up.
2008-04-11Save and restore dsparb and d_state regsKeith Packard
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