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AgeCommit message (Collapse)Author
2008-02-16nv40: actually init all tile regs.Ben Skeggs
2008-02-13i915: Add a dri2 init path that gets the lock from the dri2 sarea.Kristian Høgsberg
2008-02-13i915: Only look up dev_priv->mmio_map if it's not already set upKristian Høgsberg
2008-02-13i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID.Kristian Høgsberg
2008-02-13i915: Make sarea_priv setup optional.Kristian Høgsberg
2008-02-07Fix saveGR array sizeJesse Barnes
Make sure we have enough room for all the GR registers or we'll end up clobbering the AR index register (which should actually be harmless unless the BIOS is making an assumption about it).
2008-02-07i915: save/restore interrupt stateJesse Barnes
On resume, if the interrupt state isn't restored correctly, we may end up with a flood of unexpected or ill-timed interrupts, which could cause the kernel to disable the interrupt or vblank events to happen at the wrong time. So save/restore them properly.
2008-02-05i915: Re-report breadcrumbs on poll to the fence manager,Thomas Hellstrom
since a breadcrumb may actually turn up before a corresponding fence object has been placed on the fence ring.
2008-02-04nouveau: make nv34 work every time, not just every 2nd timeStuart Bennett
And make nv30_graph_init a bit more like mmio-traces
2008-02-02nouveau: NV40 can/should now be able to run after the blob.Maarten Maathuis
- Moved the fix from the ddx to drm, because it seemed more appropriate. - Don't be shy, report if it works for you or not.
2008-01-30i915: Avoid calling drm_fence_flush_old excessively.Thomas Hellstrom
2008-01-30Simplify the fencing code and differentiate between flushes andThomas Hellstrom
waiting types. Add a "command_stream_barrier" method to the bo driver.
2008-01-30nv40: some more nv67 changesBen Skeggs
With some luck the drm-side will be OK now for this chipset.
2008-01-29Add new RV380 pci idMirko
bug 14289
2008-01-27drm: add initial rs690 support for drm.Maciej Cencora
This adds support for configuring the RS690 GART.
2008-01-25mach64: fix after vblank-reworkGeorge Sapountzis
don't disable vblank interrupts (similar to r128)
2008-01-24Fixup modeset ioctl number & typedef usageJesse Barnes
Should be 0x08 rather than 0xa0, and shouldn't use typedefs.
2008-01-24Merge commit 'airlied/i915-ttm-cfu'Eric Anholt
This requires updated Mesa to handle the new relocation format.
2008-01-24Remove broken 'in vblank' accountingJesse Barnes
We need to return an accurate vblank count to the callers of ->get_vblank_counter, and in the Intel case the actual frame count register isn't udpated until the next active line is displayed, so we need to return one more than the frame count register if we're currently in a vblank period. However, none of the various ways of doing this is working yet, so disable the logic for now. This may result in a few missed events, but should fix the hangs some people have seen due to the current code tripping the wraparound logic in drm_update_vblank_count.
2008-01-24i915: fix missing header when copying data from userspaceDave Airlie
2008-01-24i915 make relocs use copy from userDave Airlie
Switch relocs to using copy from user and remove index and pass buffer handles in instead.
2008-01-23Fix thinko in get_vblank_counterJesse Barnes
Should use vtotal not htotal to figure out if we're in a vblank period.
2008-01-23Fix IS_I915G macroJesse Barnes
One to many parantheses...
2008-01-23nouveau: Fix warning in nouveau_mem.cMaarten Maathuis
2008-01-23drm/i915: add support for E7221Dave Airlie
2008-01-22Correct vblank count valueJesse Barnes
The frame count registers don't increment until the start of the next frame, so make sure we return an incremented count if called during the actual vblank period.
2008-01-22i915 irq fixesJesse Barnes
Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read vblank counter registers on disabled pipes (might hang otherwise). And deal with flipped pipe/plane mappings if present.
2008-01-22Merge branch 'master' into vblank-rework, including mach64 supportJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_irq.c shared-core/radeon_irq.c shared-core/via_irq.c Mostly trivial conflicts. mach64 support from Mathieu Bérard.
2008-01-22Revert "Fix pipe<->plane mapping vs. vblank handling (again)"Dave Airlie
This reverts commit bfc29606e4a818897eebca46a5e23bbe7bc3ce25. This regresses i915 here for me I can't get greater than 0.333 fps with gears
2008-01-21nouveau: don't forget NV80.Stephane Marchesin
2008-01-21nouveau: new card family for old card designs.Stephane Marchesin
2008-01-17Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.Eric Anholt
2008-01-15i915: Add chipset id for Intel Integrated Graphics DeviceZhenyu Wang
This adds new chipset id in drm. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15Properly propagate the user-space fence flags.Thomas Hellstrom
This avoids a sync flush when user-space has already programmed and MI_FLUSH in the batchbuffer.
2008-01-14nouveau: make mem alloc debug a little more verbose.Stephane Marchesin
2008-01-11nv05: enable ctx/op methods, and ignore patch valid failures.Ben Skeggs
Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-08nouveau: AGP reset correction - don't touch FW bitStuart Bennett
2008-01-07nv50: more small changesBen Skeggs
2008-01-07nv50: oops, lost some state saving along the way somewhere.Ben Skeggs
xf86-video-nv will now work again after nouveau.
2008-01-07nv50: hook up timer funcs...Ben Skeggs
2008-01-07nv50: abort on chips without ctx ucodeBen Skeggs
2008-01-07nv50: some needed ctx valsBen Skeggs
2008-01-07nv50: some cleanups + small changesBen Skeggs
2008-01-07Nouveau: ppc oops.Stephane Marchesin
2008-01-07Nouveau: move PPC bios copy to firstopen.Stephane Marchesin
2008-01-06nouveau: Add ctx_voodoo for NV86Jeremy Kolb
2008-01-04via: add P4M900 pci id.Xavier Bachelot
bug 12108
2008-01-04[PATCH] nouveau: reset AGP on init for < nv40Stuart Bennett
This is necessary for AGP to work after running bios init scripts on nv3x, and is seen in mmio traces of all cards (nv04-nv4x) I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt) use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know the effects of using the wrong one
2008-01-04[PATCH] nouveau: Fix nv20/30 context loadingStuart Bennett
Don't set the context as valid until it has been loaded
2008-01-03mach64: some more minor cleanupsDave Airlie