| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-09-09 | nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load | Matthieu Castet | |
| 2007-09-09 | nouveau : nv10 pipe ctx switch load/save. | Matthieu Castet | |
| This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes | |||
| 2007-09-08 | nouveau: Add Quadro NVS 140 pciid | Maarten Maathuis | |
| 2007-09-07 | nouveau: Use nv41 ctxprog/vals on nv42. | Ben Skeggs | |
| 2007-09-06 | Merge branch 'xgi-0-0-2' | Ian Romanick | |
| 2007-09-06 | nouveau: fix some nv04 graph switching. | Stephane Marchesin | |
| 2007-09-06 | nouveau: add pure nv30 support. | Stephane Marchesin | |
| 2007-09-04 | Add context init voodoo and context switch code for NV41. | Maarten Maathuis | |
| 2007-08-31 | Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into ↵ | Ian Romanick | |
| xgi-0-0-2 | |||
| 2007-08-31 | nouveau: nv04 context switching support. Works for starting X up at least. | Stephane Marchesin | |
| 2007-08-31 | nouveau: give nv03 the last cut. | Stephane Marchesin | |
| 2007-08-28 | Add register defines for hw binning | Keith Packard | |
| 2007-08-28 | drm: remove XFREE86_VERSION macros | Dave Airlie | |
| 2007-08-26 | nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition | Matthieu Castet | |
| - fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+ | |||
| 2007-08-25 | nouveau : nv1x graph reworks | Matthieu Castet | |
| - add forgotten init value - use the same PGRAPH_DEBUG than the blob - remove init of ddx reg : it should be done with object - better handle of channel destruction hope I didn't break anything ;) | |||
| 2007-08-25 | nouveau: nv10: output a warning if last channel invalid, and switch to next | Patrice Mandin | |
| 2007-08-23 | nouveau: nv10: check some NULL pointers inside context switch | Patrice Mandin | |
| 2007-08-22 | nouveau : fix some potential crashes with objects causing hash collision | Matthieu Castet | |
| 2007-08-22 | nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do. | Ben Skeggs | |
| 2007-08-22 | nouveau/nv40: Dump extra info on ucode state if ctx switch fails. | Ben Skeggs | |
| 2007-08-22 | nouveau: NV4c ctx ucode. | Ben Skeggs | |
| Seems we already have a nv4c_ctx_init() somehow, a quick check shows the ucode matches it still. | |||
| 2007-08-22 | nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit. | Ben Skeggs | |
| 2007-08-22 | nouveau: redo nv30_graph.c. Should work better, but we still lack a couple ↵ | Stephane Marchesin | |
| of cards. | |||
| 2007-08-22 | nouveau: fix the comment and debug message for PCIGART size | Stephane Marchesin | |
| 2007-08-21 | nouveau: Add NV44 ctx ucode. Patch from stillunknown. | Ben Skeggs | |
| Microcode is similar enough to the NV4A one that it should be able to use the same initial PGRAPH context. One day this mess will go away, honest.. | |||
| 2007-08-21 | nouveau: Poke 0x2230 on NV47 also. | Ben Skeggs | |
| Makes 0x2220 work the same way as on NV40. | |||
| 2007-08-19 | Check also for Linux, as it's not supported on different OS | Patrice Mandin | |
| 2007-08-19 | Function pci_get_bus_and_slot needs 2.6.19 or later | Patrice Mandin | |
| 2007-08-17 | nouveau: Detect memory on NFORCE/NFORCE2 correctly. | Ben Skeggs | |
| 2007-08-15 | nouveau: Use count parameter in nouveau_notifier_alloc(). | Ben Skeggs | |
| 2007-08-15 | nouveau: Turn some messages into DRM_DEBUGs.. | Ben Skeggs | |
| 2007-08-15 | nouveau: Allow GART notifiers when using sgdma code. | Ben Skeggs | |
| 2007-08-15 | nouveau: Workaround mysterious PRAMIN clobbering by the card. | Ben Skeggs | |
| 2007-08-14 | Eliminate unused / useless ioctls. | Ian Romanick | |
| 2007-08-15 | nouveau: Catch all NV4x chips instead of just NV_40. | Ben Skeggs | |
| 2007-08-15 | nouveau/nv40: Fix channel scheduling. | Ben Skeggs | |
| Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels will appear to "freeze" in some circumstances. | |||
| 2007-08-11 | i915: i965 non-secure batchbuffer bit has moved. | Dave Airlie | |
| 2007-08-10 | nouveau/nv50: demagic instmem setup. | Ben Skeggs | |
| 2007-08-10 | nouveau: Allow creation of gpuobjs before any other init has taken place. | Ben Skeggs | |
| 2007-08-09 | Unify alloc and free ioctls. | Ian Romanick | |
| The DRM_XGI_PCIE_ALLOC and DRM_XGI_FB_ALLOC ioctls (and the matching free ioctls) are unified to DRM_XGI_ALLOC. The desired memory region is selected by xgi_mem_alloc::location. The region is magically encoded in xgi_mem_alloc::index, which is used to release the memory. Bump to version 0.11.0. This update requires a new DDX. | |||
| 2007-08-09 | nouveau: silence irq handler a bit | Ben Skeggs | |
| 2007-08-09 | nouveau/nv40: add some missing pciids. | Ben Skeggs | |
| 2007-08-08 | nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry | Matthieu Castet | |
| This should improve multi fifo | |||
| 2007-08-08 | nouveau: Always allocate drm's push buffer in VRAM | Ben Skeggs | |
| Fixes #11868 | |||
| 2007-08-08 | nouveau: return channel id | Ben Skeggs | |
| 2007-08-08 | nouveau/nv50: hack up initial channel context from current state | Ben Skeggs | |
| We really should be providing static values like the nv40 PGRAPH code does, however, this will do for now to keep X at least working. | |||
| 2007-08-08 | nouveau: enable/disable engine-specific interrupts in _init()/_takedown() | Ben Skeggs | |
| All interrupts are still masked by PMC until init is finished. | |||
| 2007-08-07 | nouveau : fix enable irq (in the previous code all irq were masked by engine | Matthieu Castet | |
| init after irq_postinstall) | |||
| 2007-08-07 | nouveau: Init global gpuobj list early, unbreaks sgdma code. | Ben Skeggs | |
| 2007-08-06 | nouveau: Bump PCI GART to 16MB | Stephane Marchesin | |
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core