Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-06-09 | RADEON: switch IGP gart to use radeon_write_agp_base() | Alex Deucher | |
2008-06-08 | Fix typo in i915_suspend | Robert Noland | |
Reported by vehemens | |||
2008-06-08 | I915 suspend/resume for FreeBSD | Robert Noland | |
2008-06-09 | r300/r500: add hier-z regs | Dave Airlie | |
2008-06-05 | radeon: Restore software interrupt on resume. | Dennis Kasprzyk | |
Fixes performance drop after suspend/resume on some systems. | |||
2008-06-03 | drm: sg alloc should write back the handle to userspace | Dave Airlie | |
2008-05-30 | RADEON: fix typo in last commit | Alex Deucher | |
2008-05-30 | r500: attempt to make AGP work by programming agp base in the MC correctly | Dave Airlie | |
2008-05-28 | radeon: split microcode out into a separate header file. | Dave Airlie | |
2008-05-28 | i915: fix BSD bh, DRI2 not uses anywhere else | Dave Airlie | |
2008-05-28 | radeon: bump release date/version for r500 3D support | Dave Airlie | |
2008-05-27 | RADEON: add get_param for number of GB pipes | Alex Deucher | |
2008-05-27 | [i915] Fix typo in (unused) START_ADDR definition. | Jie Luo | |
2008-05-27 | [FreeBSD] Add vblank-rework support and get drivers building. | Robert Noland | |
The i915 driver now works again. | |||
2008-05-23 | r500: add two more register ranges for mesa driver to setup | Dave Airlie | |
2008-05-23 | drm: fix nouveau warning | Dave Airlie | |
2008-05-21 | rs690/r500: vblank support. | Dave Airlie | |
The new display controller has the vblank interrupts in a different place. Add support for vbl interrupts for these chips | |||
2008-05-17 | r500: add more register ranges for Mesa driver | Dave Airlie | |
2008-05-13 | RS4xx: separate out RS400 and RS480 IGP chips | Alex Deucher | |
RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480. | |||
2008-05-12 | RADEON: fix copy/pasto in last commit | Alex Deucher | |
2008-05-12 | R3/4/5: init pipe setup in drm | Alex Deucher | |
Similar (broken) code in mesa needs to be removed | |||
2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
2008-05-12 | R300+: fixup PURGE/FLUSH macros | Alex Deucher | |
2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
first step in merging rs4xx/rs6xx gart setup | |||
2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
2008-05-05 | r500: add allowed range for us config/pixsize | Dave Airlie | |
2008-05-02 | nv50: enable 0x400500 bit 0 after PGRAPH exception also | Ben Skeggs | |
No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :) | |||
2008-05-02 | nouveau: guard against channels potentially not having a context, fix nv50 | Ben Skeggs | |
2008-05-02 | nouveau: disable all card interrupts when unknown PFIFO IRQ occurs. | Ben Skeggs | |
This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet. | |||
2008-05-02 | nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler | Ben Skeggs | |
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown. | |||
2008-05-02 | nouveau: gather nsource in trap_info() | Ben Skeggs | |
The IRQ handling stuff really is a mess.. On the TODO :) | |||
2008-05-02 | nv50: PGRAPH exception handling completely different from earlier chips | Ben Skeggs | |
2008-05-01 | nv50: I cave... Add nv84 initial context values. | Ben Skeggs | |
I swore I'd actually do this properly and not go the horrible route we did with nv4x, but I won't get around to it just yet with so many *actually* interesting things to do first.. One day. Since someone already added nv86, why not! | |||
2008-04-29 | i915: fix off by one in VGA save/restore of AR & CR regs | Jesse Barnes | |
Turns out it's important to save/restore AR14 in particular. | |||
2008-04-29 | nouveau: NV9x cards exist as well. | Maarten Maathuis | |
2008-04-27 | Use fixed sized types in new ioctls | Jesse Barnes | |
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat issues. | |||
2008-04-26 | Enum-ectomy of vblank modesetting ioctl | Jesse Barnes | |
Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this. | |||
2008-04-23 | i915: fix for compatibility mode | Xiang, Haihao | |
2008-04-22 | i915: gfx hw and i945gme fixes from upstream | Dave Airlie | |
From Jesse and Zhenyu originally. | |||
2008-04-20 | [I915] Handle tiled buffers in vblank tasklet | Keith Packard | |
The vblank tasklet update code must build 2D blt commands with the appropriate tiled flags. | |||
2008-04-20 | On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank | Keith Packard | |
The batchbuffer submission paths were fixed to use the 965-specific command, but the vblank tasklet was not. When the older version is sent, the 965 will lock up. | |||
2008-04-11 | Save and restore dsparb and d_state regs | Keith Packard | |
2008-04-05 | nv50: primitive i2c interrupt handler | Maarten Maathuis | |
2008-04-03 | nv50: primitive display interrupt handler. | Maarten Maathuis | |
2008-03-31 | nouveau: fix return from function.. | Dave Airlie | |
dude kernel moduless use kernel errors :) this fixes an oops on init when this codepath hits. | |||
2008-03-30 | nouveau: forgot to add a break | Maarten Maathuis | |