| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
| 2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
| 2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
| 2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
| 2008-05-12 | R300+: fixup PURGE/FLUSH macros | Alex Deucher | |
| 2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
| 2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
| first step in merging rs4xx/rs6xx gart setup | |||
| 2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
| 2008-05-05 | r500: add allowed range for us config/pixsize | Dave Airlie | |
| 2008-05-02 | nv50: enable 0x400500 bit 0 after PGRAPH exception also | Ben Skeggs | |
| No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :) | |||
| 2008-05-02 | nouveau: guard against channels potentially not having a context, fix nv50 | Ben Skeggs | |
| 2008-05-02 | nouveau: disable all card interrupts when unknown PFIFO IRQ occurs. | Ben Skeggs | |
| This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet. | |||
| 2008-05-02 | nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler | Ben Skeggs | |
| Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown. | |||
| 2008-05-02 | nouveau: gather nsource in trap_info() | Ben Skeggs | |
| The IRQ handling stuff really is a mess.. On the TODO :) | |||
| 2008-05-02 | nv50: PGRAPH exception handling completely different from earlier chips | Ben Skeggs | |
| 2008-05-01 | nv50: I cave... Add nv84 initial context values. | Ben Skeggs | |
| I swore I'd actually do this properly and not go the horrible route we did with nv4x, but I won't get around to it just yet with so many *actually* interesting things to do first.. One day. Since someone already added nv86, why not! | |||
| 2008-04-29 | i915: fix off by one in VGA save/restore of AR & CR regs | Jesse Barnes | |
| Turns out it's important to save/restore AR14 in particular. | |||
| 2008-04-29 | nouveau: NV9x cards exist as well. | Maarten Maathuis | |
| 2008-04-27 | Use fixed sized types in new ioctls | Jesse Barnes | |
| Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat issues. | |||
| 2008-04-26 | Enum-ectomy of vblank modesetting ioctl | Jesse Barnes | |
| Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this. | |||
| 2008-04-23 | i915: fix for compatibility mode | Xiang, Haihao | |
| 2008-04-22 | i915: gfx hw and i945gme fixes from upstream | Dave Airlie | |
| From Jesse and Zhenyu originally. | |||
| 2008-04-20 | [I915] Handle tiled buffers in vblank tasklet | Keith Packard | |
| The vblank tasklet update code must build 2D blt commands with the appropriate tiled flags. | |||
| 2008-04-20 | On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank | Keith Packard | |
| The batchbuffer submission paths were fixed to use the 965-specific command, but the vblank tasklet was not. When the older version is sent, the 965 will lock up. | |||
| 2008-04-11 | Save and restore dsparb and d_state regs | Keith Packard | |
| 2008-04-05 | nv50: primitive i2c interrupt handler | Maarten Maathuis | |
| 2008-04-03 | nv50: primitive display interrupt handler. | Maarten Maathuis | |
| 2008-03-31 | nouveau: fix return from function.. | Dave Airlie | |
| dude kernel moduless use kernel errors :) this fixes an oops on init when this codepath hits. | |||
| 2008-03-30 | nouveau: forgot to add a break | Maarten Maathuis | |
| 2008-03-30 | nouveau: Add ctx values for nv86. | Maarten Maathuis | |
| - Note that this may not work for all nv86. | |||
| 2008-03-30 | drm/r300: fix wait interface mixup | Dave Airlie | |
| This interface was defined completely wrong, however userspace has only ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use it properly. | |||
| 2008-03-29 | r300: Correctly translate the value for the R300_CMD_WAIT command. | Oliver McFadden | |
| Previously, the R300_CMD_WAIT command would write the passed directly to the hardware. However this is incorrect because the R300_WAIT_* values used are internal interface values that do not map directly to the hardware. The new function I have added translates the R300_WAIT_* values into appropriate values for the hardware before writing the register. Thanks to John Bridgman for pointing this out. :-) | |||
| 2008-03-25 | nouveau: nv20 bios does not initialise PTIMER | Stuart Bennett | |
| The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw | |||
| 2008-03-24 | i915: fix oops on agp=off | Dave Airlie | |
| Kernel bug 10289. | |||
| 2008-03-24 | Merge branch 'r500-fp' | Dave Airlie | |
| 2008-03-24 | nv40: voodoo - not quite. | Ben Skeggs | |
| 2008-03-24 | nv40: allocate massive amount of PRAMIN for grctx on all chipsets. | Ben Skeggs | |
| More or less a workaround for issues on some chipsets where a context switch results in critical data in PRAMIN being overwritten by the GPU. The correct fix is known, but may take some time before it's a feasible option. | |||
| 2008-03-21 | r500: fragment program upload is also used to upload constants. | Dave Airlie | |
| Limit frag address to 8 bits | |||
| 2008-03-20 | drm: fixup r500fp submission | Dave Airlie | |
| 2008-03-20 | nouveau: do not set on-board timer's numerator/denominator to bad values | Stuart Bennett | |
| 2008-03-19 | RADEON: switch over to new production microcode | Alex Deucher | |
| This needs to be tested thoroughly before pushing to the kernel. | |||
| 2008-03-19 | RADEON: production microcode for all radeons, r1xx-r6xx | Alex Deucher | |
| This updated microcode is not in use yet. | |||
| 2008-03-19 | move some more r300 regs into not allowed on r500 | Dave Airlie | |
| 2008-03-18 | drm: add new rs690 pci id | Dave Airlie | |
| 2008-03-17 | initial r500 RS and FP register and upload code | Dave Airlie | |
| 2008-03-17 | drm/pcigart: fix the pci gart to use the drm_pci wrapper. | Dave Airlie | |
| This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2008-03-16 | Avoid unnecessary waits for command regulator pause. | Thomas Hellstrom | |
| 2008-03-16 | [via] Remove some leftover vars. | Thomas Hellstrom | |
| 2008-03-16 | [via] The millionth fixup for the millionth-1 attempt to stabilize the AGP | Thomas Hellstrom | |
| DMA command submission. It's worth remembering that all new bright ideas on how to make this command reader work properly and according to docs will probably fail :( Bring in some old code. | |||
| 2008-03-16 | [via] Fix driver after vblank-rework merge. | Thomas Hellstrom | |
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core