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2009-10-29Add support for vblank eventsKristian Høgsberg
The kernel will now write data to the DRM fd for various event types if requested. Currently, the only supported event is a vblank event: it contains the vblank count for the event as well as a timestamp from when the event ocurred. Since the DRM fd is now pollable, it's easy to integrate into existing event loops.
2009-10-13intel: Add the defines for the kernel overlay support landing in 2.6.33.Eric Anholt
2009-10-03libdrm_radeon: Update RADEON_TILING_* flags to what's in current kernels.Michel Dänzer
2009-10-02intel: Mark cached bo as purgeableChris Wilson
Set the DONTNEED flag on cached buffers so that the kernel is free to discard those when under memory pressure. [anholt: This takes firefox-talos-gfx time from ~62 seconds to ~65 seconds on my GM965, but it seems like a hit worth taking for the improved functionality from saving memory] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-25Kill last remnant of replacefb ioctlJakob Bornecrantz
Kenrels doesn't expose this ioctl
2009-08-24radeon: pull in z pipe changes from kernelAlex Deucher
2009-08-22radeon: add support for busy/domain check interface.Pauli Nieminen
airlied: modified the interface to drop busy return value, just return it normally, also fixed int->uint32_t for domain Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
2009-08-18nouveau: support for copy-less pushbuf ioctlBen Skeggs
2009-08-01libdrm_radeon: add tiling supportDave Airlie
2009-07-28nouveau: drm api 0.0.15, update object header, remove fake bo supportBen Skeggs
2009-07-15Add RADEON_INIT_R600_CP tooAlex Deucher
this rounds out the r6xx/r7xx stuff in radeon_drm.h
2009-07-15Add R600_SCRATCH_REG_OFFSET to radeon_drm.hAlex Deucher
This lets us libdrm from master for r6xx/r7xx 3d
2009-07-06libdrm: Remove typedef for non-existing enumPauli Nieminen
2009-06-23remove some old ttm bitsDave Airlie
2009-06-22drm: Strip old ttm.Thomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
2009-06-17libdrm/radeon: add initial libdrm_radeonDave Airlie
requires --enable-radeon-experimental-api for now
2009-06-05nouveau: 0.0.14 + extend bo interface to support subrange mappingBen Skeggs
Normal map() should operate as before, and map_range()/map_flush() should give correct results but lacking any performance difference from map(). Nothing exiting being done here yet, but the interface is a good start.
2009-06-02nv50: magic fix for "3d busted without the binary driver first" issueBen Skeggs
No idea what this reg does.. NVIDIA put 0x802 into it on some chips, the criteria aren't too clear on when they do that however. Hopefully 0x800 will work everywhere...
2009-05-26nouveau: bump for 0.0.13Ben Skeggs
2009-05-22nouveau: backlight support for ppc laptopsDanny Tholen
Patch allows the backlight to be manipulated under gnome on apple powerpc based NV30 machines. It works fine on my powerbook, and should also work for older NV17/NV18 machines. Note that older powerpc specific tools (pbbuttonsd) have some problems with this implementation (because the device is not yet there at the start time of the daemon, and the code makes incorrect assumptions about the max brightness values). However, IMHO these things can and should be addressed in the daemon. Some style/warning fixes applied by Stuart Bennett <stuart@freedesktop.org>
2009-05-14Add new drm_intel_get_pipe_from_crtc_id function.Carl Worth
This wraps the new DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID ioctl, allowing applications to discover the pipe number corresponding to a given CRTC ID. This is necessary for doing pipe-specific operations such as waiting for vblank on a given CRTC.
2009-05-10Use C99 versions of __FUNCTION__ & __volatile__ when not building with gccAlan Coopersmith
2009-05-07nouveau: fix ppc for swab changes in Linux 2.6.29Danny Tholen
2009-03-30nouveau: nForce 1/2 IGP memory sanity check from DDXStuart Bennett
2009-03-25nouveau: plug drm fifo ioremap leak (#14941)Stuart Bennett
2009-03-25nouveau: add linux compat defines for PCI config access, use them for nvidia ↵Stuart Bennett
IGPs
2009-03-25nouveau: use PFB_CSTATUS naming from ddx (reg introduced with nv10)Stuart Bennett
NV04 had a PFB_FIFO_DATA at the same address, which we don't use, so remove it to reduce confusion
2009-03-16FreeBSD: Don't set the PZERO flag to mtx_sleep.Robert Noland
We also don't support anything old enough to need tsleep.
2009-03-06drm/nouveau: make portion of vram as reserved for PRAMIN on all chipsetsBen Skeggs
NV04 was completely busted. Push buffers were getting allocated at the end of VRAM, overwriting PRAMIN. So, it turns out PRAMIN is in VRAM on all chips. Question answered!
2009-03-02drm: drop Linux < 2.6.19 supportPekka Paalanen
This also means dropping the DRM_ODD_MM_COMPAT case. Signed-off-by: Pekka Paalanen <pq@iki.fi>
2009-02-27Move vblank_init to driver load time.Robert Noland
2009-02-25i915: Backport jbarnes gm45 vblank counter patch.Robert Noland
2009-02-24i915: A few whitespace cleanups.Robert Noland
2009-02-24radeon: Prepare radeon for msi support.Robert Noland
2009-02-24i915: This was part of a sync to the intel driver at some pointRobert Noland
-Remove the old TTM interface -Move register definitions to i915_reg.h -Rework the irq handler
2009-02-23i915: Rip out the use of vblank_swapRobert Noland
2009-02-18nouveau: Add in-kernel backlight control supportMatthew Garrett
Several nvidia-based systems don't support backlight control via the standard ACPI control mechanisms. Instead, it's necessary for the driver to modify the backlight control registers directly. This patch adds support for determining whether the registers appear to be in use, and if so registers a kernel backlight device to control them. The backlight can then be controlled via existing userspace tools. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-02-15nv40: fail completely if we don't have a ctxprog for the chipsetBen Skeggs
2009-02-15nv50: context info for chipset 0xa0Ben Skeggs
2009-02-11drm/nv50: fix nv9x chipsetsBen Skeggs
NVIDIA do this fun little sequence after updating the PRAMIN page tables. On 9xxx chips, none of the PRAMIN BAR bindings (except the initial one) worked, hence the majority of the setup needed to create a channel ended up in the wrong place, causing all sorts of fun. This is done by NVIDIA on nv8x chips also, so we'll do it for them too, even though they appear to work without it.
2009-02-11drm/nv50: add context info for nv98Ben Skeggs
It won't work yet, just like the other 9xxx chips. Real soon now :)
2009-02-10drm/nv50: use a slightly different initial context for nv96Ben Skeggs
I'm not 100% sure that the nv94 one we were using won't work. The context layouts are identical (well.. same ctxprog, so of course!), only a couple of registers differ. But, be safe until we actually get some 9xxx chips working.
2009-02-10drm/nv50: correct ramfc pointer in channel headerBen Skeggs
Suprisingly the card still worked without this...
2009-02-10drm/nv50: let the card handle the initial context switchBen Skeggs
Our PFIFO/PGRAPH context save/load functions don't really work well (at all?) on nv5x yet. Depending on what random state the card is in before the drm loads, fbcon probably won't work correctly. Luckily we've setup the GPU in such a way that it'll actually do a hw context switch for the first context. Not sure of how successful this'd be currently on the older chips (actually, pretty sure it won't work), so NV50 only for now.
2009-02-07nouveau: don't try to traverse non-existent listsStuart Bennett
Fixes nouveau_ioctl_mem_free Oops
2009-02-04nouveau: bring in new mm api definitions, without the actual mm codeBen Skeggs
Use of the new bits is guarded with a mm_enabled=0 hardcode.
2009-02-02Remove the "nv" driver.Stephane Marchesin
2009-01-29nouveau: don't save channel context if it has recently become invalidStuart Bennett
Bug exposed by DDX change d9da090c
2009-01-29nouveau: no suspend support for nv50+Stuart Bennett
2009-01-27intel: libdrm support for fence management in execbufJesse Barnes
This patch tries to use the available fence count to figure out whether a given batch can succeed or not (just like the aperture check). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>