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2007-08-22nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit.Ben Skeggs
2007-08-22nouveau: redo nv30_graph.c. Should work better, but we still lack a couple ↵Stephane Marchesin
of cards.
2007-08-22nouveau: fix the comment and debug message for PCIGART sizeStephane Marchesin
2007-08-21nouveau: Add NV44 ctx ucode. Patch from stillunknown.Ben Skeggs
Microcode is similar enough to the NV4A one that it should be able to use the same initial PGRAPH context. One day this mess will go away, honest..
2007-08-21nouveau: Poke 0x2230 on NV47 also.Ben Skeggs
Makes 0x2220 work the same way as on NV40.
2007-08-19Check also for Linux, as it's not supported on different OSPatrice Mandin
2007-08-19Function pci_get_bus_and_slot needs 2.6.19 or laterPatrice Mandin
2007-08-17nouveau: Detect memory on NFORCE/NFORCE2 correctly.Ben Skeggs
2007-08-15nouveau: Use count parameter in nouveau_notifier_alloc().Ben Skeggs
2007-08-15nouveau: Turn some messages into DRM_DEBUGs..Ben Skeggs
2007-08-15nouveau: Allow GART notifiers when using sgdma code.Ben Skeggs
2007-08-15nouveau: Workaround mysterious PRAMIN clobbering by the card.Ben Skeggs
2007-08-15nouveau: Catch all NV4x chips instead of just NV_40.Ben Skeggs
2007-08-15nouveau/nv40: Fix channel scheduling.Ben Skeggs
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels will appear to "freeze" in some circumstances.
2007-08-11i915: i965 non-secure batchbuffer bit has moved.Dave Airlie
2007-08-10nouveau/nv50: demagic instmem setup.Ben Skeggs
2007-08-10nouveau: Allow creation of gpuobjs before any other init has taken place.Ben Skeggs
2007-08-09nouveau: silence irq handler a bitBen Skeggs
2007-08-09nouveau/nv40: add some missing pciids.Ben Skeggs
2007-08-08nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entryMatthieu Castet
This should improve multi fifo
2007-08-08nouveau: Always allocate drm's push buffer in VRAMBen Skeggs
Fixes #11868
2007-08-08nouveau: return channel idBen Skeggs
2007-08-08nouveau/nv50: hack up initial channel context from current stateBen Skeggs
We really should be providing static values like the nv40 PGRAPH code does, however, this will do for now to keep X at least working.
2007-08-08nouveau: enable/disable engine-specific interrupts in _init()/_takedown()Ben Skeggs
All interrupts are still masked by PMC until init is finished.
2007-08-07nouveau : fix enable irq (in the previous code all irq were masked by engineMatthieu Castet
init after irq_postinstall)
2007-08-07nouveau: Init global gpuobj list early, unbreaks sgdma code.Ben Skeggs
2007-08-06nouveau: Bump PCI GART to 16MBStephane Marchesin
2007-08-06nouveau: ouch, add nouveau_dma.[ch] files..Ben Skeggs
2007-08-06nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway.Ben Skeggs
Need to find another way of doing this, ideally someone'd hunt down which object/method controls it! The Xv blit adaptor is likely now broken on cards that have pNv->WaitVSyncPossible enabled.
2007-08-06nouveau: Give DRM its own gpu channelBen Skeggs
If your card doesn't have working context switching, it is now broken.
2007-08-06nouveau: Determine trapped channel id from active grctx on >=NV40Ben Skeggs
2007-08-06nouveau: Various internal and external API changesBen Skeggs
1. DRM_NOUVEAU_GPUOBJ_FREE Used to free GPU objects. The obvious usage case is for Gr objects, but notifiers can also be destroyed in the same way. GPU objects gain a destructor method and private data fields with this change, so other specialised cases (like notifiers) can be implemented on top of gpuobjs. 2. DRM_NOUVEAU_CHANNEL_FREE 3. DRM_NOUVEAU_CARD_INIT Ideally we'd do init during module load, but this isn't currently possible. Doing init during firstopen() is bad as X has a love of opening/closing the DRM many times during startup. Once the modesetting-101 branch is merged this can go away. IRQs are enabled in nouveau_card_init() now, rather than having the X server call drmCtlInstHandler(). We'll need this for when we give the kernel module its own channel. 4. DRM_NOUVEAU_GETPARAM Add CHIPSET_ID value, which will return the chipset id derived from NV_PMC_BOOT_0. 4. Use list_* in a few places, rather than home-brewed stuff.
2007-08-06nouveau: Pass channel struct around instead of channel id.Ben Skeggs
2007-08-03nouveau:nv10: fill and use load,save graph context functionsPatrice Mandin
2007-07-27nouveau: creating notifier in PCI memory for PCIGARTArthur Huillet
2007-07-20Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.Eric Anholt
The data is now in kernel space, copied in/out as appropriate according to the This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal with those failures. This also means that XFree86 4.2.0 support for i810 DRM is lost.
2007-07-20Replace filp in ioctl arguments with drm_file *file_priv.Eric Anholt
As a fallout, replace filp storage with file_priv storage for "unique identifier of a client" all over the DRM. There is a 1:1 mapping, so this should be a noop. This could be a minor performance improvement, as everything on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls went the other direction.
2007-07-20Remove DRM_ERR OS macro.Eric Anholt
This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code.
2007-07-19FreeBSD warnings cleanup.Eric Anholt
2007-07-19Merge branch 'origin'Eric Anholt
2007-07-19nouveau/nv50: get non-default push buffer sizes working.Ben Skeggs
2007-07-18Add dry-coded DRM drawable private information storage for FreeBSD.Eric Anholt
With this, all modules build again.
2007-07-18nouveau: Make nouveau_wait_for_idle() read PTIMER.Pekka Paalanen
Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is halted). The timeout was selected as 1 giga-ticks, which for me is 1s.
2007-07-18nouveau: Add read() method to Engine.timer.Pekka Paalanen
This is not called from anywhere, yet.
2007-07-18nouveau: Add bitfield names for NSOURCE and NSTATUS.Pekka Paalanen
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
2007-07-18nouveau: Replace 0x00400104 and 0x00400108 with names.Pekka Paalanen
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. The prefix NV03 is chosen because nv10reg.h had no versioned prefix, and the code using these registers does not check card_type.
2007-07-18fix some missing whitespace/tabDave Airlie
2007-07-18drm: remove drm_u64_t, replace with uint64_t everwhereDave Airlie
This might break something, stdint.h inclusion in drm.h maybe required but I'm not sure yet what platforms have it what ones don't.
2007-07-17nouveau: Destroy PGRAPH context table on PGRAPH takedownBen Skeggs
2007-07-17nouveau: G8x PCIEGARTBen Skeggs
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART support for G8X using the current mm has been hacked on top of it.
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