Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-10-10 | nouveau : nv10 and nv04 PGRAPH_NSTATUS are different | Matthieu Castet | |
2007-10-10 | nouveau: PMC_BOOT_1 was not mapped. | Maarten Maathuis | |
2007-10-10 | nouveau: try to fix big endian. | Stephane Marchesin | |
2007-10-07 | nouveau: A char is signed, so it may overflow for >NV50. | Maarten Maathuis | |
2007-10-06 | nouveau : print correct value in nouveau_graph_dump_trap_info for nv04 | Matthieu Castet | |
2007-10-05 | Merge branch 'pre-superioctl-branch' | Dave Airlie | |
2007-10-04 | nouveau: Remove excess device classes. | Maarten Maathuis | |
2007-10-04 | nouveau: NV47 context switching voodoo + warning | Maarten Maathuis | |
2007-10-04 | nouveau: Switch over to using PMC_BOOT_0 for card detection. | Maarten Maathuis | |
2007-10-04 | nouveau: nv2a drm context switch support. | Stephane Marchesin | |
2007-10-02 | nouveau: nv20 graph_create_context difference | Pekka Paalanen | |
nv20 writes the chan->id to a different place than nv28. This still does not make nv20 run nv10_demo. | |||
2007-10-02 | nouveau: fix nv25_graph_context_init | Pekka Paalanen | |
It was writing 4x the data in a loop. | |||
2007-10-02 | nouveau: nv20 graph context init | Stuart Bennett | |
2007-10-01 | nouveau: Fix dereferencing a NULL pointer when erroring out during ↵ | Maarten Maathuis | |
initialization. | |||
2007-10-01 | nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but ↵ | Stephane Marchesin | |
causes nv30 issues. | |||
2007-09-30 | nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE | Matthieu Castet | |
2007-09-30 | nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle | Matthieu Castet | |
Also clean PGRAPH_CHANNEL macros | |||
2007-09-30 | nouveau: rename nv30_graph.c to nv20_graph.c | Pekka Paalanen | |
2007-09-30 | nouveau: nv30 graph function renames, removed nv20_graph.c | Pekka Paalanen | |
All nv30 functions in nv30_graph.c that can be used on nv20 are renamed as accordingly. nv20 specific parts from nv20_graph.c are moved into nv30_graph.c. | |||
2007-09-30 | nouveau: graph ctx init nv25 | Pekka Paalanen | |
According to mmio_trace_900XGL.tar.bz2 by Evan Fraser the nv25 init is exactly the same as nv28 init. | |||
2007-09-30 | nouveau: nv28 graph context init | Pekka Paalanen | |
2007-09-30 | nouveau: let nv20 hardware do ctx switching automatically. | Pekka Paalanen | |
2007-09-30 | nouveau: Make nv20 use the nv30 PGRAPH ctx functions. | Pekka Paalanen | |
2007-09-30 | nouveau: Change couple constants to symbols. | Pekka Paalanen | |
2007-09-30 | nouveau: NV30 should never call nouveau_nv20_context_switch(). | Pekka Paalanen | |
2007-09-30 | nouveau : pgraph_ctx dynamic alloc for nv04, nv10 | Matthieu Castet | |
2007-09-30 | nouveau : nv04 don't use chan->pgraph_ctx array | Matthieu Castet | |
This commit is a first step to dynamic alloc pgraph context on nv04, nv10. | |||
2007-09-29 | nouveau : stop the fifo of the channel we are deleting | Matthieu Castet | |
2007-09-29 | nouveau : nv1x fix strange corruption | Matthieu Castet | |
that appears when running glxgears and nouveau demo | |||
2007-09-29 | radeon: Commit the ring after each partial texture upload blit. | chaohong guo | |
This makes sure each blit starts as early as possible, which may improve texture upload performance in some cases. | |||
2007-09-28 | nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array. | Matthieu Castet | |
This avoid hardcoding pgraph_ctx size and potential buffer overflow. | |||
2007-09-28 | Revert drm_i915_flip_t braindamage | Jesse Barnes | |
I should not have renamed this field. I should not have renamed this field. I should not have renamed this field. On the plus side, it was at least binary compatible. | |||
2007-09-25 | Merge branch 'master' into pre-superioctl-branch | Thomas Hellstrom | |
Conflicts: linux-core/drm_bo.c linux-core/drm_fence.c linux-core/drm_objects.h shared-core/drm.h | |||
2007-09-25 | drm: use fence_class as name instead of class | Dave Airlie | |
2007-09-22 | Add fence error member. | Thomas Hellstrom | |
Modify the TTM backend bind arguments. Export a number of functions needed for driver-specific super-ioctls. Add a function to map buffer objects from the kernel, regardless of where they're currently placed. A number of error fixes. | |||
2007-09-21 | Merge branch 'bo-set-pin' | Eric Anholt | |
This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a separate privileged ioctl to pin buffers like NO_EVICT meant before. The functionality that was supposed to be covered by NO_MOVE may be reintroduced later, possibly in a different way, after the superioctl branch is merged. | |||
2007-09-21 | Add some more verbosity to drm_bo_set_pin_req comments. | Eric Anholt | |
2007-09-21 | nouveau: fix ppc and get it right this time. | Stephane Marchesin | |
2007-09-21 | nouveau: fix notifiers on PPC. | Stephane Marchesin | |
2007-09-21 | nouveau: add some checks to the nv04 graph switching code. | Stephane Marchesin | |
2007-09-19 | Merge branch 'origin' into bo-set-pin | Eric Anholt | |
2007-09-18 | i915: Reinstate check that drawable has valid information in i915_vblank_swap. | Michel Dänzer | |
2007-09-18 | i915: Fix scheduled buffer swaps. | Michel Dänzer | |
One instance of unlocking a spinlock was converted incorrectly when this code was fixed to build on BSD. | |||
2007-09-18 | Add ioc32 compat layer for XGI DRM. | Ian Romanick | |
2007-09-12 | Remove plane->pipe mapping from SAREA private after all | Jesse Barnes | |
We can figure out which pipe a given plane is mapped to by looking at the display control registers instead of tracking it in a new SAREA private field. If this becomes a performance problem, we could move to an ioctl based solution by adding a new parameter for the DDX to set (defaulting to the old behavior if the param was never set of course). | |||
2007-09-11 | Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm | Jesse Barnes | |
2007-09-11 | Disambiguate planes & pipes for swap operations | Jesse Barnes | |
This mod makes the SAREA track plane to pipe mappings and corrects the name of the plane info variables (they were mislabeled as pipe info since until now all code assumed a direct mapping between planes and pipes). It also updates the flip ioctl argument to take a set of planes rather than pipes, since planes are flipped while pipes generate vblank events. | |||
2007-09-10 | nouveau: nv10: add combiner registers | Patrice Mandin | |
2007-09-09 | nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load | Matthieu Castet | |
2007-09-09 | nouveau : nv10 pipe ctx switch load/save. | Matthieu Castet | |
This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes |