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AgeCommit message (Expand)Author
2007-04-02r300: Synchronize the register header file again.Oliver McFadden
2007-04-01nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+Matthieu Castet
2007-04-01nouveau : nv10 ctx switch fixMatthieu Castet
2007-04-01nouveau : set the correct PGRAPH_CTX_CONTROL registerMatthieu Castet
2007-03-30Merge branch 'crestline-qa', adding support for the 965GM chipset.Eric Anholt
2007-03-29nouveau: fix nv04 context switches.Stephane Marchesin
2007-03-27drm/i915: set the bo up at firstopen time not after DMA initDave Airlie
2007-03-27Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
2007-03-23Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-23nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOsBen Skeggs
2007-03-23nouveau: remove unused cruftBen Skeggs
2007-03-21Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-21nouveau: support multiple channels per client (breaks drm interface)Ben Skeggs
2007-03-19Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-19more whitespace issuesDave Airlie
2007-03-19whitespace cleanup pending a kernel mergeDave Airlie
2007-03-14Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-13r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; notOliver McFadden
2007-03-13Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-13Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.Oliver McFadden
2007-03-13nouveau: make sure cmdbuf object gets destroyedBen Skeggs
2007-03-13nouveau: associate all created objects with a channel + cleanupsBen Skeggs
2007-03-13nouveau: s/fifo/channel/Ben Skeggs
2007-03-13Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to eitherOliver McFadden
2007-03-13Guess another unknown register used for R300 pacification.Oliver McFadden
2007-03-12Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-11nouveau: PUT,GET, not 2xPUTPatrice Mandin
2007-03-07Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-07Add via CX700.Thomas Hellstrom
2007-03-05Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-04radeon: make PCI GART aperture size variable, but making table size variableDave Airlie
2007-03-04ati: make pcigart code able to handle variable size PCI GART apertureDave Airlie
2007-03-01Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
2007-02-25Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-25drm: remove unnecessary NULL checks, and fix some indents..Jakob Bornecrantz
2007-02-16Simple fence object sample driver for via, based on idling the GPU.Thomas Hellstrom
2007-02-15Initial support for fence object classes.Thomas Hellstrom
2007-02-14Merge branch 'ttm-vram-0-1-branch'Thomas Hellstrom
2007-02-14Remove an intel-specific hack and replace it with a fence driver callback.Thomas Hellstrom
2007-02-14nouveau: fix the build on big endian (thanks CyberFoxx)Stephane Marchesin
2007-02-14nouveau: fix memory initialization with multiple cards.B. Rathmann
2007-02-13Bugzilla Bug #9457Thomas Hellstrom
2007-02-13i915: Add 965GM pci id updateWang Zhenyu
2007-02-12Update flags and comments.Thomas Hellstrom
2007-02-11Sync r300_reg.h from mesa driver. #10210Aapo Tahkola
2007-03-10Merge branch 'i915-pageflip'Michel Dänzer
2007-03-10i915: Only wait for pending flips before asynchronous flips again.Michel Dänzer
2007-03-09i915: Do not wait for pending flips on both pipes at the same time.Michel Dänzer
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